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1// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 2>&1 < %s| FileCheck %s2 3 4// ------------------------------------------------------------------------- //5// Invalid element size6 7cmla z0.h, z1.b, z2.b[0], #08// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width9// CHECK-NEXT: cmla z0.h, z1.b, z2.b[0], #010// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:11 12cmla z0.h, z1.s, z2.s[0], #013// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width14// CHECK-NEXT: cmla z0.h, z1.s, z2.s[0], #015// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:16 17cmla z0.h, z1.d, z2.d[0], #018// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width19// CHECK-NEXT: cmla z0.h, z1.d, z2.d[0], #020// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:21 22cmla z0.s, z1.b, z2.b[0], #023// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width24// CHECK-NEXT: cmla z0.s, z1.b, z2.b[0], #025// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:26 27cmla z0.s, z1.h, z2.h[0], #028// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width29// CHECK-NEXT: cmla z0.s, z1.h, z2.h[0], #030// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:31 32cmla z0.s, z1.d, z2.d[0], #033// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width34// CHECK-NEXT: cmla z0.s, z1.d, z2.d[0], #035// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:36 37 38// ------------------------------------------------------------------------- //39// Invalid restricted register for indexed vector.40 41cmla z0.h, z1.h, z8.h[3], #042// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction43// CHECK-NEXT: cmla z0.h, z1.h, z8.h[3], #044// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:45 46cmla z0.s, z1.s, z16.s[1], #047// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction48// CHECK-NEXT: cmla z0.s, z1.s, z16.s[1], #049// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:50 51 52// ------------------------------------------------------------------------- //53// Invalid element index54 55cmla z0.h, z1.h, z7.h[-1], #056// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].57// CHECK-NEXT: cmla z0.h, z1.h, z7.h[-1], #058// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:59 60cmla z0.h, z1.h, z7.h[4], #061// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 3].62// CHECK-NEXT: cmla z0.h, z1.h, z7.h[4], #063// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:64 65cmla z0.s, z1.s, z15.s[-1], #066// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].67// CHECK-NEXT: cmla z0.s, z1.s, z15.s[-1], #068// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:69 70cmla z0.s, z1.s, z15.s[2], #071// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: vector lane must be an integer in range [0, 1].72// CHECK-NEXT: cmla z0.s, z1.s, z15.s[2], #073// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:74 75 76// --------------------------------------------------------------------------//77// Invalid rotation78 79cmla z0.h, z1.h, z2.h[0], #36080// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: complex rotation must be 0, 90, 180 or 270.81// CHECK-NEXT: cmla z0.h, z1.h, z2.h[0], #36082// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:83 84cmla z0.s, z1.s, z2.s[0], #45085// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: complex rotation must be 0, 90, 180 or 270.86// CHECK-NEXT: cmla z0.s, z1.s, z2.s[0], #45087// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:88 89 90// --------------------------------------------------------------------------//91// Negative tests for instructions that are incompatible with movprfx92 93movprfx z0.b, p0/z, z7.b94cmla z0.b, z1.b, z31.b, #095// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx96// CHECK-NEXT: cmla z0.b, z1.b, z31.b, #097// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:98 99movprfx z0.s, p0/z, z7.s100cmla z0.s, z1.s, z15.s[1], #0101// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a predicated movprfx, suggest using unpredicated movprfx102// CHECK-NEXT: cmla z0.s, z1.s, z15.s[1], #0103// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:104