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1// RUN: llvm-mc -triple=arm64-linux-gnu_ilp32 -o - < %s | FileCheck %s2// RUN: llvm-mc -triple=arm64-linux-gnu_ilp32 -show-encoding \3// RUN: -o - < %s | FileCheck --check-prefix=CHECK-ENCODING %s4// RUN: llvm-mc -triple=arm64-linux-gnu_ilp32 -filetype=obj < %s | \5// RUN: llvm-objdump --triple=arm64-linux-gnu - -r | \6// RUN: FileCheck %s --check-prefix=CHECK-OBJ-ILP327 8 add x0, x2, #:lo12:sym9// CHECK: add x0, x2, :lo12:sym10// CHECK-OBJ-ILP32: 0 R_AARCH64_P32_ADD_ABS_LO12_NC sym11 12 add x5, x7, #:dtprel_lo12:sym13// CHECK: add x5, x7, :dtprel_lo12:sym14// CHECK-OBJ-ILP32: 4 R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12 sym15 16 add x9, x12, #:dtprel_lo12_nc:sym17// CHECK: add x9, x12, :dtprel_lo12_nc:sym18// CHECK-OBJ-ILP32: 8 R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC sym19 20 add x20, x30, #:tprel_lo12:sym21// CHECK: add x20, x30, :tprel_lo12:sym22// CHECK-OBJ-ILP32: c R_AARCH64_P32_TLSLE_ADD_TPREL_LO12 sym23 24 add x9, x12, #:tprel_lo12_nc:sym25// CHECK: add x9, x12, :tprel_lo12_nc:sym26// CHECK-OBJ-ILP32: 10 R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC sym27 28 add x5, x0, #:tlsdesc_lo12:sym29// CHECK: add x5, x0, :tlsdesc_lo12:sym30// CHECK-OBJ-ILP32: 14 R_AARCH64_P32_TLSDESC_ADD_LO12 sym31 32 add x0, x2, #:lo12:sym+833// CHECK: add x0, x2, :lo12:sym34// CHECK-OBJ-ILP32: 18 R_AARCH64_P32_ADD_ABS_LO12_NC sym+0x835 36 add x5, x7, #:dtprel_lo12:sym+137// CHECK: add x5, x7, :dtprel_lo12:sym+138// CHECK-OBJ-ILP32: 1c R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12 sym+0x139 40 add x9, x12, #:dtprel_lo12_nc:sym+241// CHECK: add x9, x12, :dtprel_lo12_nc:sym+242// CHECK-OBJ-ILP32:20 R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC sym+0x243 44 add x20, x30, #:tprel_lo12:sym+1245// CHECK: add x20, x30, :tprel_lo12:sym+1246// CHECK-OBJ-ILP32: 24 R_AARCH64_P32_TLSLE_ADD_TPREL_LO12 sym+0xc47 48 add x9, x12, #:tprel_lo12_nc:sym+5449// CHECK: add x9, x12, :tprel_lo12_nc:sym+5450// CHECK-OBJ-ILP32: 28 R_AARCH64_P32_TLSLE_ADD_TPREL_LO12_NC sym+0x3651 52 add x5, x0, #:tlsdesc_lo12:sym+7053// CHECK: add x5, x0, :tlsdesc_lo12:sym+7054// CHECK-OBJ-ILP32: 2c R_AARCH64_P32_TLSDESC_ADD_LO12 sym+0x4655 56 .hword sym + 4 - .57// CHECK-OBJ-ILP32: 30 R_AARCH64_P32_PREL16 sym+0x458 .word sym - . + 859// CHECK-OBJ-ILP32: 32 R_AARCH64_P32_PREL32 sym+0x860 61 .hword sym62// CHECK-OBJ-ILP32: 36 R_AARCH64_P32_ABS16 sym63 .word sym+164// CHECK-OBJ-ILP32: 38 R_AARCH64_P32_ABS32 sym+0x165 66 adrp x0, sym67// CHECK: adrp x0, sym68// CHECK-OBJ-ILP32: 3c R_AARCH64_P32_ADR_PREL_PG_HI21 sym69 70 adrp x15, :got:sym71// CHECK: adrp x15, :got:sym72// CHECK-OBJ-ILP32: 40 R_AARCH64_P32_ADR_GOT_PAGE sym73 74 adrp x29, :gottprel:sym75// CHECK: adrp x29, :gottprel:sym76// CHECK-OBJ-ILP32: 44 R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21 sym77 78 adrp x2, :tlsdesc:sym79// CHECK: adrp x2, :tlsdesc:sym80// CHECK-OBJ-ILP32: 48 R_AARCH64_P32_TLSDESC_ADR_PAGE21 sym81 82 // LLVM is not competent enough to do this relocation because the83 // page boundary could occur anywhere after linking. A relocation84 // is needed.85 adrp x3, trickQuestion86 .global trickQuestion87trickQuestion:88// CHECK: adrp x3, trickQuestion89// CHECK-OBJ-ILP32: 4c R_AARCH64_P32_ADR_PREL_PG_HI21 trickQuestion90 91 ldrb w2, [x3, :lo12:sym]92 ldrsb w5, [x7, #:lo12:sym]93 ldrsb x11, [x13, :lo12:sym]94 ldr b17, [x19, #:lo12:sym]95// CHECK: ldrb w2, [x3, :lo12:sym]96// CHECK: ldrsb w5, [x7, :lo12:sym]97// CHECK: ldrsb x11, [x13, :lo12:sym]98// CHECK: ldr b17, [x19, :lo12:sym]99// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST8_ABS_LO12_NC sym100// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST8_ABS_LO12_NC sym101// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST8_ABS_LO12_NC sym102// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST8_ABS_LO12_NC sym103 104 ldrb w23, [x29, #:dtprel_lo12_nc:sym]105 ldrsb w23, [x19, #:dtprel_lo12:sym]106 ldrsb x17, [x13, :dtprel_lo12_nc:sym]107 ldr b11, [x7, #:dtprel_lo12:sym]108// CHECK: ldrb w23, [x29, :dtprel_lo12_nc:sym]109// CHECK: ldrsb w23, [x19, :dtprel_lo12:sym]110// CHECK: ldrsb x17, [x13, :dtprel_lo12_nc:sym]111// CHECK: ldr b11, [x7, :dtprel_lo12:sym]112// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12_NC sym113// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12 sym114// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12_NC sym115// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST8_DTPREL_LO12 sym116 117 ldrb w1, [x2, :tprel_lo12:sym]118 ldrsb w3, [x4, #:tprel_lo12_nc:sym]119 ldrsb x5, [x6, :tprel_lo12:sym]120 ldr b7, [x8, #:tprel_lo12_nc:sym]121// CHECK: ldrb w1, [x2, :tprel_lo12:sym]122// CHECK: ldrsb w3, [x4, :tprel_lo12_nc:sym]123// CHECK: ldrsb x5, [x6, :tprel_lo12:sym]124// CHECK: ldr b7, [x8, :tprel_lo12_nc:sym]125// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12 sym126// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC sym127// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12 sym128// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST8_TPREL_LO12_NC sym129 130 ldrh w2, [x3, #:lo12:sym]131 ldrsh w5, [x7, :lo12:sym]132 ldrsh x11, [x13, #:lo12:sym]133 ldr h17, [x19, :lo12:sym]134// CHECK: ldrh w2, [x3, :lo12:sym]135// CHECK: ldrsh w5, [x7, :lo12:sym]136// CHECK: ldrsh x11, [x13, :lo12:sym]137// CHECK: ldr h17, [x19, :lo12:sym]138// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST16_ABS_LO12_NC sym139// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST16_ABS_LO12_NC sym140// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST16_ABS_LO12_NC sym141// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST16_ABS_LO12_NC sym142 143 ldrh w23, [x29, #:dtprel_lo12_nc:sym]144 ldrsh w23, [x19, :dtprel_lo12:sym]145 ldrsh x17, [x13, :dtprel_lo12_nc:sym]146 ldr h11, [x7, #:dtprel_lo12:sym]147// CHECK: ldrh w23, [x29, :dtprel_lo12_nc:sym]148// CHECK: ldrsh w23, [x19, :dtprel_lo12:sym]149// CHECK: ldrsh x17, [x13, :dtprel_lo12_nc:sym]150// CHECK: ldr h11, [x7, :dtprel_lo12:sym]151// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12_NC sym152// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12 sym153// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12_NC sym154// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST16_DTPREL_LO12 sym155 156 ldrh w1, [x2, :tprel_lo12:sym]157 ldrsh w3, [x4, #:tprel_lo12_nc:sym]158 ldrsh x5, [x6, :tprel_lo12:sym]159 ldr h7, [x8, #:tprel_lo12_nc:sym]160// CHECK: ldrh w1, [x2, :tprel_lo12:sym]161// CHECK: ldrsh w3, [x4, :tprel_lo12_nc:sym]162// CHECK: ldrsh x5, [x6, :tprel_lo12:sym]163// CHECK: ldr h7, [x8, :tprel_lo12_nc:sym]164// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12 sym165// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC sym166// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12 sym167// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST16_TPREL_LO12_NC sym168 169 ldr w1, [x2, #:lo12:sym]170 ldrsw x3, [x4, #:lo12:sym]171 ldr s4, [x5, :lo12:sym]172// CHECK: ldr w1, [x2, :lo12:sym]173// CHECK: ldrsw x3, [x4, :lo12:sym]174// CHECK: ldr s4, [x5, :lo12:sym]175// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST32_ABS_LO12_NC sym176// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST32_ABS_LO12_NC sym177// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST32_ABS_LO12_NC sym178 179 ldr w1, [x2, :dtprel_lo12:sym]180 ldrsw x3, [x4, #:dtprel_lo12_nc:sym]181 ldr s4, [x5, #:dtprel_lo12_nc:sym]182// CHECK: ldr w1, [x2, :dtprel_lo12:sym]183// CHECK: ldrsw x3, [x4, :dtprel_lo12_nc:sym]184// CHECK: ldr s4, [x5, :dtprel_lo12_nc:sym]185// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST32_DTPREL_LO12 sym186// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST32_DTPREL_LO12_NC sym187// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST32_DTPREL_LO12_NC sym188 189 190 ldr w1, [x2, #:tprel_lo12:sym]191 ldrsw x3, [x4, :tprel_lo12_nc:sym]192 ldr s4, [x5, :tprel_lo12_nc:sym]193// CHECK: ldr w1, [x2, :tprel_lo12:sym]194// CHECK: ldrsw x3, [x4, :tprel_lo12_nc:sym]195// CHECK: ldr s4, [x5, :tprel_lo12_nc:sym]196// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12 sym197// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC sym198// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST32_TPREL_LO12_NC sym199 200 ldr x28, [x27, :lo12:sym]201 ldr d26, [x25, :lo12:sym]202// CHECK: ldr x28, [x27, :lo12:sym]203// CHECK: ldr d26, [x25, :lo12:sym]204// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST64_ABS_LO12_NC sym205// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST64_ABS_LO12_NC sym206 207 ldr w24, [x23, :got_lo12:sym]208 ldr s22, [x21, :got_lo12:sym]209// CHECK: ldr w24, [x23, :got_lo12:sym]210// CHECK: ldr s22, [x21, :got_lo12:sym]211// CHECK-OBJ-ILP32: R_AARCH64_P32_LD32_GOT_LO12_NC sym212// CHECK-OBJ-ILP32: R_AARCH64_P32_LD32_GOT_LO12_NC sym213 214 ldr x24, [x23, :dtprel_lo12_nc:sym]215 ldr d22, [x21, :dtprel_lo12:sym]216// CHECK: ldr x24, [x23, :dtprel_lo12_nc:sym]217// CHECK: ldr d22, [x21, :dtprel_lo12:sym]218// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST64_DTPREL_LO12_NC sym219// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST64_DTPREL_LO12 sym220 221 ldr q24, [x23, :dtprel_lo12_nc:sym]222 ldr q22, [x21, :dtprel_lo12:sym]223// CHECK: ldr q24, [x23, :dtprel_lo12_nc:sym]224// CHECK: ldr q22, [x21, :dtprel_lo12:sym]225// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST128_DTPREL_LO12_NC sym226// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLD_LDST128_DTPREL_LO12 sym227 228 ldr x24, [x23, :tprel_lo12:sym]229 ldr d22, [x21, :tprel_lo12_nc:sym]230// CHECK: ldr x24, [x23, :tprel_lo12:sym]231// CHECK: ldr d22, [x21, :tprel_lo12_nc:sym]232// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12 sym233// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST64_TPREL_LO12_NC sym234 235 ldr q24, [x23, :tprel_lo12:sym]236 ldr q22, [x21, :tprel_lo12_nc:sym]237// CHECK: ldr q24, [x23, :tprel_lo12:sym]238// CHECK: ldr q22, [x21, :tprel_lo12_nc:sym]239// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST128_TPREL_LO12 sym240// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSLE_LDST128_TPREL_LO12_NC sym241 242 ldr w24, [x23, :gottprel_lo12:sym]243 ldr s22, [x21, :gottprel_lo12:sym]244 245 ldr w24, [x23, :tlsdesc_lo12:sym]246 ldr s22, [x21, :tlsdesc_lo12:sym]247// CHECK: ldr w24, [x23, :tlsdesc_lo12:sym]248// CHECK: ldr s22, [x21, :tlsdesc_lo12:sym]249// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSDESC_LD32_LO12 sym250// CHECK-OBJ-ILP32: R_AARCH64_P32_TLSDESC_LD32_LO12 sym251 252 ldr q20, [x19, #:lo12:sym]253// CHECK: ldr q20, [x19, :lo12:sym]254// CHECK-OBJ-ILP32: R_AARCH64_P32_LDST128_ABS_LO12_NC sym255// check encoding here, since encoding test doesn't belong with TLS encoding256// tests, as it isn't a TLS relocation.257// CHECK-ENCODING: ldr q20, [x19, :lo12:sym] // encoding: [0x74,0bAAAAAA10,0b11AAAAAA,0x3d]258// CHECK-ENCODING-NEXT: 0, value: :lo12:sym, kind: fixup_aarch64_ldst_imm12_scale16259 260// Since relocated instructions print without a '#', that syntax should261// certainly be accepted when assembling.262 add x3, x5, :lo12:imm263// CHECK: add x3, x5, :lo12:imm264