436 lines · plain
1// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s2// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 %s 2>&1 | FileCheck --implicit-check-not=error: %s3// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1013 -mattr=+wavefrontsize32 %s 2>&1 | FileCheck --implicit-check-not=error: %s4 5v_add_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x06// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported7 8v_ashrrev_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x09// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported10 11v_ceil_f64_dpp v[0:1], v[2:3] quad_perm:[1,1,1,1] row_mask:0xf bank_mask:0xf12// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported13 14v_cmp_class_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]15// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported16 17v_cmp_class_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]18// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported19 20v_cmp_eq_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]21// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported22 23v_cmp_eq_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]24// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported25 26v_cmp_eq_i16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]27// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported28 29v_cmp_eq_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]30// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported31 32v_cmp_eq_u16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]33// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported34 35v_cmp_eq_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]36// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported37 38v_cmp_f_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]39// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported40 41v_cmp_f_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]42// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported43 44v_cmp_f_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]45// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported46 47v_cmp_f_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]48// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported49 50v_cmp_ge_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]51// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported52 53v_cmp_ge_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]54// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported55 56v_cmp_ge_i16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]57// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported58 59v_cmp_ge_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]60// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported61 62v_cmp_ge_u16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]63// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported64 65v_cmp_ge_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]66// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported67 68v_cmp_gt_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]69// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported70 71v_cmp_gt_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]72// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported73 74v_cmp_gt_i16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]75// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported76 77v_cmp_gt_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]78// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported79 80v_cmp_gt_u16_dpp v1, v2 row_shl:0x7 row_mask:0x0 bank_mask:0x0 fi:181// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported82 83v_cmp_gt_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]84// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported85 86v_cmp_le_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]87// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported88 89v_cmp_le_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]90// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported91 92v_cmp_le_i16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]93// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported94 95v_cmp_le_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]96// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported97 98v_cmp_le_u16_dpp v1, v2 dpp8:[7,7,7,3,4,4,6,7] fi:199// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported100 101v_cmp_le_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]102// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported103 104v_cmp_lg_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]105// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported106 107v_cmp_lg_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]108// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported109 110v_cmp_lt_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]111// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported112 113v_cmp_lt_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]114// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported115 116v_cmp_lt_i16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]117// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported118 119v_cmp_lt_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]120// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported121 122v_cmp_lt_u16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]123// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported124 125v_cmp_lt_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]126// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported127 128v_cmp_ne_i16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]129// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported130 131v_cmp_ne_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]132// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported133 134v_cmp_ne_u16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]135// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported136 137v_cmp_ne_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]138// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported139 140v_cmp_neq_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]141// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported142 143v_cmp_neq_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]144// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported145 146v_cmp_nge_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]147// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported148 149v_cmp_nge_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]150// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported151 152v_cmp_ngt_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]153// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported154 155v_cmp_ngt_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]156// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported157 158v_cmp_nle_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]159// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported160 161v_cmp_nle_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]162// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported163 164v_cmp_nlg_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]165// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported166 167v_cmp_nlg_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]168// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported169 170v_cmp_nlt_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]171// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported172 173v_cmp_nlt_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]174// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported175 176v_cmp_o_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]177// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported178 179v_cmp_o_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]180// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported181 182v_cmp_t_i32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]183// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported184 185v_cmp_t_u32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]186// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported187 188v_cmp_tru_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]189// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported190 191v_cmp_tru_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]192// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported193 194v_cmp_u_f16_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]195// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported196 197v_cmp_u_f32_dpp vcc, v1, v2 dpp8:[7,6,5,4,3,2,1,0]198// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported199 200v_cmpx_class_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]201// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported202 203v_cmpx_class_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]204// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported205 206v_cmpx_eq_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]207// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported208 209v_cmpx_eq_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]210// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported211 212v_cmpx_eq_i16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]213// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported214 215v_cmpx_eq_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]216// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported217 218v_cmpx_eq_u16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]219// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported220 221v_cmpx_eq_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]222// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported223 224v_cmpx_f_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]225// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported226 227v_cmpx_f_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]228// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported229 230v_cmpx_f_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]231// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported232 233v_cmpx_f_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]234// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported235 236v_cmpx_ge_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]237// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported238 239v_cmpx_ge_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]240// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported241 242v_cmpx_ge_i16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]243// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported244 245v_cmpx_ge_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]246// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported247 248v_cmpx_ge_u16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]249// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported250 251v_cmpx_ge_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]252// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported253 254v_cmpx_gt_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]255// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported256 257v_cmpx_gt_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]258// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported259 260v_cmpx_gt_i16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]261// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported262 263v_cmpx_gt_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]264// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported265 266v_cmpx_gt_u16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]267// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported268 269v_cmpx_gt_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]270// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported271 272v_cmpx_le_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]273// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported274 275v_cmpx_le_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]276// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported277 278v_cmpx_le_i16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]279// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported280 281v_cmpx_le_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]282// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported283 284v_cmpx_le_u16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]285// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported286 287v_cmpx_le_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]288// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported289 290v_cmpx_lg_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]291// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported292 293v_cmpx_lg_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]294// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported295 296v_cmpx_lt_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]297// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported298 299v_cmpx_lt_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]300// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported301 302v_cmpx_lt_i16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]303// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported304 305v_cmpx_lt_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]306// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported307 308v_cmpx_lt_u16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]309// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported310 311v_cmpx_lt_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]312// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported313 314v_cmpx_ne_i16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]315// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported316 317v_cmpx_ne_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]318// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported319 320v_cmpx_ne_u16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]321// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported322 323v_cmpx_ne_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]324// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported325 326v_cmpx_neq_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]327// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported328 329v_cmpx_neq_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]330// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported331 332v_cmpx_nge_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]333// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported334 335v_cmpx_nge_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]336// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported337 338v_cmpx_ngt_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]339// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported340 341v_cmpx_ngt_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]342// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported343 344v_cmpx_nle_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]345// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported346 347v_cmpx_nle_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]348// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported349 350v_cmpx_nlg_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]351// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported352 353v_cmpx_nlg_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]354// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported355 356v_cmpx_nlt_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]357// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported358 359v_cmpx_nlt_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]360// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported361 362v_cmpx_o_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]363// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported364 365v_cmpx_o_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]366// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported367 368v_cmpx_t_i32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]369// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported370 371v_cmpx_t_u32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]372// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported373 374v_cmpx_tru_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]375// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported376 377v_cmpx_tru_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]378// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported379 380v_cmpx_u_f16_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]381// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported382 383v_cmpx_u_f32_dpp v1, v2 dpp8:[7,6,5,4,3,2,1,0]384// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported385 386v_cvt_f32_f64_dpp v5, v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf387// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported388 389v_cvt_i32_f64_dpp v5, v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf390// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported391 392v_cvt_u32_f64_dpp v5, v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf393// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported394 395v_floor_f64_dpp v[10:11], v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf396// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported397 398v_fract_f64_dpp v[10:11], v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf399// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported400 401v_frexp_exp_i32_f64_dpp v5, v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf402// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported403 404v_frexp_mant_f64_dpp v[10:11], v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf405// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported406 407v_lshlrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0408// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported409 410v_lshrrev_b16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0411// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported412 413v_max_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0414// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported415 416v_max_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0417// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported418 419v_min_i16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0420// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported421 422v_min_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0423// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported424 425v_mul_lo_u16_dpp v255, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0426// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported427 428v_sub_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0429// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported430 431v_subrev_co_u32_dpp v255, vcc, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0432// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported433 434v_trunc_f64_dpp v[10:11], v[2:3] row_newbcast:1 row_mask:0xf bank_mask:0xf435// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: dpp variant of this instruction is not supported436