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1// NOTE: Assertions have been autogenerated by utils/update_mc_test_checks.py UTC_ARGS: --unique --version 52// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 %s 2>&1 | FileCheck %s -check-prefix=GCN-ERR --implicit-check-not=error: --strict-whitespace3// RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1200 -mattr=+real-true16 %s 2>&1 | FileCheck %s -check-prefix=GCN-ERR --implicit-check-not=error: --strict-whitespace4 5//===----------------------------------------------------------------------===//6// VINTERP src operands must be VGPRs.7// Check that other operand kinds are rejected by assembler.8//===----------------------------------------------------------------------===//9 10v_interp_p10_f32 v0, s1, v2, v311// GCN-ERR: :[[@LINE-1]]:22: error: invalid operand for instruction12 13v_interp_p10_f32 v0, v1, s2, v314// GCN-ERR: :[[@LINE-1]]:26: error: invalid operand for instruction15 16v_interp_p10_f32 v0, v1, v2, s317// GCN-ERR: :[[@LINE-1]]:30: error: invalid operand for instruction18 19v_interp_p2_f32 v0, 1, v2, v320// GCN-ERR: :[[@LINE-1]]:21: error: invalid operand for instruction21 22v_interp_p2_f32 v0, v1, 2, v323// GCN-ERR: :[[@LINE-1]]:25: error: invalid operand for instruction24 25v_interp_p2_f32 v0, v1, v2, 326// GCN-ERR: :[[@LINE-1]]:29: error: invalid operand for instruction27 28v_interp_p10_f16_f32 v0, s1, v2, v3.l29// GCN-ERR: :[[@LINE-1]]:26: error: invalid operand for instruction30 31v_interp_p10_f16_f32 v0, v1.l, s2, v3.l32// GCN-ERR: :[[@LINE-1]]:32: error: invalid operand for instruction33 34v_interp_p10_f16_f32 v0, v1.l, v2, s335// GCN-ERR: :[[@LINE-1]]:36: error: invalid operand for instruction36 37v_interp_p2_f16_f32 v0.l, 1, v2, v3.l38// GCN-ERR: :[[@LINE-1]]:27: error: invalid operand for instruction39 40v_interp_p2_f16_f32 v0.l, v1.l, 2, v3.l41// GCN-ERR: :[[@LINE-1]]:33: error: invalid operand for instruction42 43v_interp_p2_f16_f32 v0.l, v1.l, v2, 344// GCN-ERR: :[[@LINE-1]]:37: error: invalid operand for instruction45