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1// RUN: llvm-mc -triple=amdgcn -show-encoding -mcpu=gfx1200 %s | FileCheck --check-prefix=GFX12 %s2 3s_addk_i32 s0, 0x12344// GFX12: s_addk_co_i32 s0, 0x1234 ; encoding: [0x34,0x12,0x80,0xb7]5 6s_getreg_b32 s0, hwreg(HW_REG_MODE)7// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_MODE) ; encoding: [0x01,0xf8,0x80,0xb8]8 9s_getreg_b32 s0, hwreg(HW_REG_STATUS)10// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_STATUS) ; encoding: [0x02,0xf8,0x80,0xb8]11 12s_getreg_b32 s0, hwreg(HW_REG_STATE_PRIV)13// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_STATE_PRIV) ; encoding: [0x04,0xf8,0x80,0xb8]14 15s_getreg_b32 s0, hwreg(HW_REG_GPR_ALLOC)16// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_GPR_ALLOC) ; encoding: [0x05,0xf8,0x80,0xb8]17 18s_getreg_b32 s0, hwreg(HW_REG_LDS_ALLOC)19// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_LDS_ALLOC) ; encoding: [0x06,0xf8,0x80,0xb8]20 21s_getreg_b32 s0, hwreg(HW_REG_EXCP_FLAG_PRIV)22// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_EXCP_FLAG_PRIV) ; encoding: [0x11,0xf8,0x80,0xb8]23 24s_getreg_b32 s0, hwreg(HW_REG_EXCP_FLAG_USER)25// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_EXCP_FLAG_USER) ; encoding: [0x12,0xf8,0x80,0xb8]26 27s_getreg_b32 s0, hwreg(HW_REG_TRAP_CTRL)28// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_TRAP_CTRL) ; encoding: [0x13,0xf8,0x80,0xb8]29 30s_getreg_b32 s0, hwreg(HW_REG_SCRATCH_BASE_LO)31// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_SCRATCH_BASE_LO) ; encoding: [0x14,0xf8,0x80,0xb8]32 33s_getreg_b32 s0, hwreg(HW_REG_SCRATCH_BASE_HI)34// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_SCRATCH_BASE_HI) ; encoding: [0x15,0xf8,0x80,0xb8]35 36s_getreg_b32 s0, hwreg(HW_REG_HW_ID1)37// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_HW_ID1) ; encoding: [0x17,0xf8,0x80,0xb8]38 39s_getreg_b32 s0, hwreg(HW_REG_HW_ID2)40// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_HW_ID2) ; encoding: [0x18,0xf8,0x80,0xb8]41 42s_getreg_b32 s0, hwreg(HW_REG_DVGPR_ALLOC_LO)43// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_DVGPR_ALLOC_LO) ; encoding: [0x1f,0xf8,0x80,0xb8]44 45s_getreg_b32 s0, hwreg(HW_REG_DVGPR_ALLOC_HI)46// GFX12: s_getreg_b32 s0, hwreg(HW_REG_WAVE_DVGPR_ALLOC_HI) ; encoding: [0x20,0xf8,0x80,0xb8]47