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1// RUN: not llvm-mc -triple=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s2// RUN: not llvm-mc -triple=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s3 4//===----------------------------------------------------------------------===//5// Generic checks6//===----------------------------------------------------------------------===//7 8v_mul_i32_i24 v1, v2, 1009// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: literal operands are not supported10 11//===----------------------------------------------------------------------===//12// _e32 checks13//===----------------------------------------------------------------------===//14 15// Immediate src116v_mul_i32_i24_e32 v1, v2, 10017// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction18 19// sgpr src120v_mul_i32_i24_e32 v1, v2, s321// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction22 23v_cndmask_b32_e32 v1, v2, v3, s[0:1]24// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction25 26//===----------------------------------------------------------------------===//27// _e64 checks28//===----------------------------------------------------------------------===//29 30// Immediate src031v_mul_i32_i24_e64 v1, 100, v332// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: literal operands are not supported33 34// Immediate src135v_mul_i32_i24_e64 v1, v2, 10036// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: literal operands are not supported37 38v_add_i32_e32 v1, s[0:1], v2, v339// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction40 41v_addc_u32_e32 v1, vcc, v2, v3, s[2:3]42// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction43 44v_addc_u32_e32 v1, s[0:1], v2, v3, s[2:3]45// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction46 47v_addc_u32_e32 v1, vcc, v2, v3, -148// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction49 50v_addc_u32_e32 v1, vcc, v2, v3, 12351// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction52 53v_addc_u32_e32 v1, vcc, v2, v3, s054// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction55 56v_addc_u32_e32 v1, -1, v2, v3, s057// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction58 59v_addc_u32 v1, -1, v2, v3, vcc60// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction61 62v_addc_u32 v1, vcc, v2, v3, 063// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction64 65v_addc_u32_e64 v1, s[0:1], v2, v3, 12366// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction67 68v_addc_u32_e64 v1, 0, v2, v3, s[0:1]69// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction70 71v_addc_u32_e64 v1, s[0:1], v2, v3, 072// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction73 74v_addc_u32 v1, s[0:1], v2, v3, 12375// CHECK: :[[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction76 77// TODO: Constant bus restrictions78