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1@ RUN: llvm-mc -triple thumbv7a--none-eabi -arm-implicit-it=always < %s -show-encoding | FileCheck %s2 3@ Single instruction4 .section test15@ CHECK-LABEL: test16 addeq r0, #17@ CHECK: it eq8@ CHECK: addeq9 10@ Multiple instructions, same condition11 .section test212@ CHECK-LABEL: test213 addeq r0, #114 addeq r0, #115 addeq r0, #116 addeq r0, #117@ CHECK: itttt eq18@ CHECK: addeq19@ CHECK: addeq20@ CHECK: addeq21@ CHECK: addeq22 23@ Multiple instructions, equal but opposite conditions24 .section test325@ CHECK-LABEL: test326 addeq r0, #127 addne r0, #128 addeq r0, #129 addne r0, #130@ CHECK: itete eq31@ CHECK: addeq32@ CHECK: addne33@ CHECK: addeq34@ CHECK: addne35 36@ Multiple instructions, unrelated conditions37 .section test438@ CHECK-LABEL: test439 addeq r0, #140 addlt r0, #141 addeq r0, #142 addge r0, #143@ CHECK: it eq44@ CHECK: addeq45@ CHECK: it lt46@ CHECK: addlt47@ CHECK: it eq48@ CHECK: addeq49@ CHECK: it ge50@ CHECK: addge51 52@ More than 4 instructions eligible for a block53 .section test554@ CHECK-LABEL: test555 addeq r0, #156 addeq r0, #157 addeq r0, #158 addeq r0, #159 addeq r0, #160 addeq r0, #161@ CHECK: itttt eq62@ CHECK: addeq63@ CHECK: addeq64@ CHECK: addeq65@ CHECK: addeq66@ CHECK: itt eq67@ CHECK: addeq68@ CHECK: addeq69 70@ Flush on a label71 .section test672@ CHECK-LABEL: test673 addeq r0, #174label:75 addeq r0, #176five:77 addeq r0, #178@ CHECK: it eq79@ CHECK: addeq80@ CHECK: label81@ CHECK: it eq82@ CHECK: addeq83@ CHECK: five84@ CHECK: it eq85@ CHECK: addeq86 87@ Flush on a section-change directive88 .section test7a89@ CHECK-LABEL: test7a90 addeq r0, #191 .section test7b92 addeq r0, #193 .previous94 addeq r0, #195 .pushsection test7c96 addeq r0, #197 .popsection98 addeq r0, #199@ CHECK: it eq100@ CHECK: addeq101@ CHECK: it eq102@ CHECK: addeq103@ CHECK: it eq104@ CHECK: addeq105@ CHECK: it eq106@ CHECK: addeq107@ CHECK: it eq108@ CHECK: addeq109 110@ Flush on an ISA change (even to the same ISA)111 .section test8112@ CHECK-LABEL: test8113 addeq r0, #1114 .thumb115 addeq r0, #1116 .arm117 addeq r0, #1118 .thumb119 addeq r0, #1120@ CHECK: it eq121@ CHECK: addeq122@ CHECK: it eq123@ CHECK: addeq124@ CHECK: addeq125@ CHECK: it eq126@ CHECK: addeq127 128@ Flush on an arch, cpu or fpu change129 .section test9130@ CHECK-LABEL: test9131 addeq r0, #1132 .arch armv7-a133 addeq r0, #1134 .cpu cortex-a15135 addeq r0, #1136 .fpu vfpv3137 addeq r0, #1138@ CHECK: it eq139@ CHECK: addeq140@ CHECK: it eq141@ CHECK: addeq142@ CHECK: it eq143@ CHECK: addeq144@ CHECK: it eq145@ CHECK: addeq146 147@ Flush on an unpredicable instruction148 .section test10149@ CHECK-LABEL: test10150 addeq r0, #1151 setend le152 addeq r0, #1153 hvc #0154 addeq r0, #1155@ CHECK: it eq156@ CHECK: addeq157@ CHECK: setend le158@ CHECK: it eq159@ CHECK: addeq160@ CHECK: hvc.w #0161@ CHECK: it eq162@ CHECK: addeq163 164@ Flush when reaching an explicit IT instruction165 .section test11166@ CHECK-LABEL: test11167 addeq r0, #1168 it eq169 addeq r0, #1170@ CHECK: it eq171@ CHECK: addeq172@ CHECK: it eq173@ CHECK: addeq174 175@ Don't extend an explicit IT instruction176 .section test12177@ CHECK-LABEL: test12178 it eq179 addeq r0, #1180 addeq r0, #1181@ CHECK: it eq182@ CHECK: addeq183@ CHECK: it eq184@ CHECK: addeq185 186@ Branch-like instructions can only be used at the end of an IT block, so187@ terminate it.188 .section test13189@ CHECK-LABEL: test13190 .cpu cortex-a15191 addeq pc, r0192 addeq pc, sp, pc193 ldreq pc, [r0, #4]194 ldreq pc, [r0, #-4]195 ldreq pc, [r0, r1]196 ldreq pc, [pc, #-0]197 moveq pc, r0198 bleq #4199 blxeq #4200 blxeq r0201 bxeq r0202 bxjeq r0203 tbbeq [r0, r1]204 tbheq [r0, r1, lsl #1]205 ereteq206 rfeiaeq r0207 rfeiaeq r0!208 rfedbeq r0209 rfedbeq r0!210 smceq #0211 ldmiaeq r0, {pc}212 ldmiaeq r0!, {r1, pc}213 ldmdbeq r0, {pc}214 ldmdbeq r0!, {r1, pc}215 popeq {pc}216 .arch armv8-m.main217 bxnseq r0218 blxnseq r0219@ CHECK: it eq220@ CHECK: addeq pc, r0221@ CHECK: it eq222@ CHECK: addeq pc, sp, pc223@ CHECK: it eq224@ CHECK: ldreq.w pc, [r0, #4]225@ CHECK: it eq226@ CHECK: ldreq pc, [r0, #-4]227@ CHECK: it eq228@ CHECK: ldreq.w pc, [r0, r1]229@ CHECK: it eq230@ CHECK: ldreq.w pc, [pc, #-0]231@ CHECK: it eq232@ CHECK: moveq pc, r0233@ CHECK: it eq234@ CHECK: bleq #4235@ CHECK: it eq236@ CHECK: blxeq #4237@ CHECK: it eq238@ CHECK: blxeq r0239@ CHECK: it eq240@ CHECK: bxeq r0241@ CHECK: it eq242@ CHECK: bxjeq r0243@ CHECK: it eq244@ CHECK: tbbeq [r0, r1]245@ CHECK: it eq246@ CHECK: tbheq [r0, r1, lsl #1]247@ CHECK: it eq248@ CHECK: ereteq249@ CHECK: it eq250@ CHECK: rfeiaeq r0251@ CHECK: it eq252@ CHECK: rfeiaeq r0!253@ CHECK: it eq254@ CHECK: rfedbeq r0255@ CHECK: it eq256@ CHECK: rfedbeq r0!257@ CHECK: it eq258@ CHECK: smceq #0259@ CHECK: it eq260@ CHECK: ldmeq.w r0, {pc}261@ CHECK: it eq262@ CHECK: ldmeq.w r0!, {r1, pc}263@ CHECK: it eq264@ CHECK: ldmdbeq r0, {pc}265@ CHECK: it eq266@ CHECK: ldmdbeq r0!, {r1, pc}267@ CHECK: it eq268@ CHECK: popeq {pc}269@ CHECK: it eq270@ CHECK: bxnseq r0271@ CHECK: it eq272@ CHECK: blxnseq r0273 274@ Thumb 16-bit ALU instructions set the flags iff they are not in an IT block,275@ so instruction matching must change when generating an implicit IT block.276 .section test14277@ CHECK-LABEL: test14278@ Outside an IT block, the 16-bit encoding must set flags279 add r0, #1280@ CHECK:add.w r0, r0, #1 @ encoding: [0x00,0xf1,0x01,0x00] 281 adds r0, #1282@ CHECK: adds r0, #1 @ encoding: [0x01,0x30]283@ Inside an IT block, the 16-bit encoding can not set flags284 addeq r0, #1285@ CHECK: itt eq286@ CHECK: addeq r0, #1 @ encoding: [0x01,0x30]287 addseq r0, #1288@ CHECK: addseq.w r0, r0, #1 @ encoding: [0x10,0xf1,0x01,0x00]289 290@ Some variants of the B instruction have their own condition code field, and291@ are not valid in IT blocks.292 .section test15293@ CHECK-LABEL: test15294@ Outside of an IT block, the 4 variants (narrow/wide,295@ predicated/non-predicated) are selected as normal, and the predicated296@ encodings are used instead of opening a new IT block:297 b #0x100298@ CHECK: b #256 @ encoding: [0x80,0xe0] 299 b #0x800300@ CHECK: b.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc]301 beq #0x4302@ CHECK-NOT: it303@ CHECK: beq #4 @ encoding: [0x02,0xd0]304 beq #0x100305@ CHECK-NOT: it306@ CHECK: beq.w #256 @ encoding: [0x00,0xf0,0x80,0x80]307 308@ We could support "beq #0x100000" to "beq #0x1fffffc" by using t2Bcc in309@ an IT block (these currently fail as the target is out of range). However, long310@ ranges like this are rarely assembly-time constants, so this probably isn't311@ worth doing.312 313@ If we already have an open IT block, we can use the non-predicated encodings,314@ which have a greater range:315 addeq r0, r1316 beq #0x4317@ CHECK: itt eq318@ CHECK: addeq r0, r1319@ CHECK: beq #4 @ encoding: [0x02,0xe0]320 addeq r0, r1321 beq #0x100322@ CHECK: itt eq323@ CHECK: addeq r0, r1324@ CHECK: beq #256 @ encoding: [0x80,0xe0]325 addeq r0, r1326 beq #0x800327@ CHECK: itt eq328@ CHECK: addeq r0, r1329@ CHECK: beq.w #2048 @ encoding: [0x00,0xf0,0x00,0xbc]330 331@ If we have an open but incompatible IT block, we close it and use the332@ self-predicated encodings, without an IT block:333 addeq r0, r1334 bgt #0x4335@ CHECK: it eq336@ CHECK: addeq r0, r1337@ CHECK: bgt #4 @ encoding: [0x02,0xdc]338 addeq r0, r1339 bgt #0x100340@ CHECK: it eq341@ CHECK: addeq r0, r1342@ CHECK: bgt.w #256 @ encoding: [0x00,0xf3,0x80,0x80]343 344@ Breakpoint instructions are allowed in IT blocks, but are always executed345@ regardless of the condition flags. We could continue an IT block through346@ them, but currently do not.347 .section test16348@ CHECK-LABEL: test16349 addeq r0, r1350 bkpt #0351 addeq r0, r1352@ CHECK: it eq353@ CHECK: addeq r0, r1354@ CHECK: bkpt #0355@ CHECK: it eq356@ CHECK: addeq r0, r1357 358@ The .if directive causes entire assembly statments to be dropped before they359@ reach the IT block generation code. This happens to be exactly what we want,360@ and allows IT blocks to extend into and out of .if blocks. Only one arm of the361@ .if will be seen by the IT state tracking code, so the subeq shouldn't have362@ any effect here.363 .section test17364@ CHECK-LABEL: test17365 addeq r0, r1366 .if 1367 addeq r0, r1368 .else369 subeq r0, r1370 .endif371 addeq r0, r1372@ CHECK: ittt eq373@ CHECK: addeq374@ CHECK: addeq375@ CHECK: addeq376 377@ TODO: There are some other directives which we could continue through, such378@ as .set and .global, but we currently conservatively flush the IT block before379@ every directive (except for .if and friends, which are handled separately).380 .section test18381@ CHECK-LABEL: test18382 addeq r0, r1383 .set s, 1384 addeq r0, r1385@ CHECK: it eq386@ CHECK: addeq387@ CHECK: it eq388@ CHECK: addeq389 390@ The .rept directive can be used to create long IT blocks.391 .section test19392@ CHECK-LABEL: test19393 .rept 3394 addeq r0, r1395 subne r0, r1396 .endr397@ CHECK: itete eq398@ CHECK: addeq r0, r1399@ CHECK: subne r0, r0, r1400@ CHECK: addeq r0, r1401@ CHECK: subne r0, r0, r1402@ CHECK: ite eq403@ CHECK: addeq r0, r1404@ CHECK: subne r0, r0, r1405 406@ Flush at end of file407 .section test99408@ CHECK-LABEL: test99409 addeq r0, #1410@ CHECK: it eq411@ CHECK: addeq412