brintos

brintos / llvm-project-archived public Read only

0
0
Text · 2.5 KiB · 51a618a Raw
69 lines · plain
1@ RUN: not llvm-mc -triple thumbv7-apple-ios %s -o /dev/null 2>&1 | FileCheck %s2add sp, r5, #13addw sp, r7, #44add sp, r3, r25add sp, r3, r5, lsl #36sub sp, r5, #17subw sp, r7, #48sub sp, r3, r29sub sp, r3, r5, lsl #310@CHECK: error: invalid instruction, any one of the following would fix this:11@CHECK-NEXT: add sp, r5, #112@CHECK-NEXT: ^13@CHECK-NEXT: note: invalid operand for instruction14@CHECK-NEXT: add sp, r5, #115@CHECK-NEXT:             ^16@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r1417@CHECK-NEXT: add sp, r5, #118@CHECK-NEXT:             ^19@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r1420@CHECK-NEXT: add sp, r5, #121@CHECK-NEXT:     ^22@CHECK-NEXT: note: operand must be a register sp23@CHECK-NEXT: add sp, r5, #124@CHECK-NEXT:         ^25@CHECK-NEXT: error: invalid instruction, any one of the following would fix this:26@CHECK-NEXT: addw sp, r7, #427@CHECK-NEXT: ^28@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r1429@CHECK-NEXT: addw sp, r7, #430@CHECK-NEXT:      ^31@CHECK-NEXT: note: operand must be a register sp32@CHECK-NEXT: addw sp, r7, #433@CHECK-NEXT:          ^34@CHECK-NEXT: error: source register must be sp if destination is sp35@CHECK-NEXT: add sp, r3, r236@CHECK-NEXT:         ^37@CHECK-NEXT: error: source register must be sp if destination is sp38@CHECK-NEXT: add sp, r3, r5, lsl #339@CHECK-NEXT:         ^40@CHECK-NEXT: error: invalid instruction, any one of the following would fix this:41@CHECK-NEXT: sub sp, r5, #142@CHECK-NEXT: ^43@CHECK-NEXT: note: invalid operand for instruction44@CHECK-NEXT: sub sp, r5, #145@CHECK-NEXT:             ^46@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r1447@CHECK-NEXT: sub sp, r5, #148@CHECK-NEXT:             ^49@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r1450@CHECK-NEXT: sub sp, r5, #151@CHECK-NEXT:     ^52@CHECK-NEXT: note: operand must be a register sp53@CHECK-NEXT: sub sp, r5, #154@CHECK-NEXT:         ^55@CHECK-NEXT: error: invalid instruction, any one of the following would fix this:56@CHECK-NEXT: subw sp, r7, #457@CHECK-NEXT: ^58@CHECK-NEXT: note: operand must be a register in range [r0, r12] or r1459@CHECK-NEXT: subw sp, r7, #460@CHECK-NEXT:      ^61@CHECK-NEXT: note: operand must be a register sp62@CHECK-NEXT: subw sp, r7, #463@CHECK-NEXT:          ^64@CHECK-NEXT: error: source register must be sp if destination is sp65@CHECK-NEXT: sub sp, r3, r266@CHECK-NEXT:         ^67@CHECK-NEXT: error: source register must be sp if destination is sp68@CHECK-NEXT: sub sp, r3, r5, lsl #369