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1@ RUN: not llvm-mc -triple armv8 -show-encoding -mattr=-neon < %s 2>&1 | FileCheck %s --check-prefix=V82 3@ VCVT{B,T}4 5  vcvtt.f64.f16 d3, s16@ V7-NOT: vcvtt.f64.f16 d3, s1      @ encoding: [0xe0,0x3b,0xb2,0xee]7  vcvtt.f16.f64 s5, d128@ V7-NOT: vcvtt.f16.f64 s5, d12     @ encoding: [0xcc,0x2b,0xf3,0xee]9 10  vsel.f32 s3, s4, s611@ V8: error: invalid instruction12  vselne.f32 s3, s4, s613@ V8: error: invalid instruction14  vselmi.f32 s3, s4, s615@ V8: error: invalid instruction16  vselpl.f32 s3, s4, s617@ V8: error: invalid instruction18  vselvc.f32 s3, s4, s619@ V8: error: invalid instruction20  vselcs.f32 s3, s4, s621@ V8: error: invalid instruction22  vselcc.f32 s3, s4, s623@ V8: error: invalid instruction24  vselhs.f32 s3, s4, s625@ V8: error: invalid instruction26  vsello.f32 s3, s4, s627@ V8: error: invalid instruction28  vselhi.f32 s3, s4, s629@ V8: error: invalid instruction30  vsells.f32 s3, s4, s631@ V8: error: invalid instruction32  vsellt.f32 s3, s4, s633@ V8: error: invalid instruction34  vselle.f32 s3, s4, s635@ V8: error: invalid instruction36 37vseleq.f32 s0, d2, d138@ V8: error: invalid instruction39vselgt.f64 s3, s2, s140@ V8: error: invalid operand for instruction41vselgt.f32 s0, q3, q142@ V8: error: invalid instruction43vselgt.f64 q0, s3, q144@ V8: error: invalid instruction45 46vmaxnm.f32 s0, d2, d147@ V8: error: invalid instruction48vminnm.f64 s3, s2, s149@ V8: error: invalid operand for instruction50vmaxnm.f32 s0, q3, q151@ V8: error: invalid instruction52vmaxnm.f64 q0, s3, q153@ V8: error: invalid instruction54vmaxnmgt.f64 q0, s3, q155@ CHECK: error: instruction 'vmaxnm' is not predicable, but condition code specified56 57vcvta.s32.f64 d3, s258@ V8: error: invalid instruction59vcvtp.s32.f32 d3, s260@ V8: error: operand must be a register in range [s0, s31]61vcvtn.u32.f64 d3, s262@ V8: error: invalid instruction63vcvtm.u32.f32 d3, s264@ V8: error: operand must be a register in range [s0, s31]65vcvtnge.u32.f64 d3, s266@ V8: error: instruction 'vcvtn' is not predicable, but condition code specified67 68vcvtbgt.f64.f16 q0, d369@ V8: error: invalid instruction70vcvttlt.f64.f16 s0, s371@ V8: error: invalid instruction, any one of the following would fix this:72@ V8: note: operand must be a register in range [d0, d31]73@ V8: note: invalid operand for instruction74vcvttvs.f16.f64 s0, s375@ V8: error: invalid instruction, any one of the following would fix this:76@ V8: note: operand must be a register in range [d0, d31]77@ V8: note: invalid operand for instruction78vcvtthi.f16.f64 q0, d379@ V8: error: operand must be a register in range [s0, s31]80 81vrintrlo.f32.f32 d3, q082@ V8: error: invalid instruction83vrintxcs.f32.f32 d3, d084@ V8: error: invalid instruction85 86vrinta.f64.f64 s3, q087@ V8: error: invalid instruction88vrintn.f32.f32 d3, d089@ V8: error: instruction requires: NEON90vrintp.f32 q3, q091@ V8: error: invalid instruction, any one of the following would fix this:92@ V8: note: instruction requires: mve.fp93@ V8: note: instruction requires: NEON94vrintmlt.f32 q3, q095@ V8: error: instruction 'vrintm' is not predicable, but condition code specified96