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1# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve -show-encoding  < %s 2>%t \2# RUN:   | FileCheck --check-prefix=CHECK %s3# RUN:     FileCheck --check-prefix=ERROR < %t %s4# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -show-encoding < %s 2>%t5# RUN:     FileCheck --check-prefix=ERROR-NOMVE < %t %s6 7# CHECK: vldrb.u8 q0, [r0] @ encoding: [0x90,0xed,0x00,0x1e]8# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve9vldrb.u8 q0, [r0]10 11# CHECK: vldrb.u8 q1, [r0] @ encoding: [0x90,0xed,0x00,0x3e]12# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve13vldrb.u8 q1, [r0]14 15# CHECK: vldrb.u8 q0, [r11] @ encoding: [0x9b,0xed,0x00,0x1e]16# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve17vldrb.u8 q0, [r11]18 19# CHECK: vldrb.u8 q3, [r11] @ encoding: [0x9b,0xed,0x00,0x7e]20# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve21vldrb.u8 q3, [r11]22 23# CHECK: vldrb.u8 q0, [r4, #56] @ encoding: [0x94,0xed,0x38,0x1e]24# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve25vldrb.u8 q0, [r4, #56]26 27# CHECK: vldrb.u8 q4, [r4, #56] @ encoding: [0x94,0xed,0x38,0x9e]28# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve29vldrb.u8 q4, [r4, #56]30 31# CHECK: vldrb.u8 q0, [r8, #56] @ encoding: [0x98,0xed,0x38,0x1e]32# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve33vldrb.u8 q0, [r8, #56]34 35# CHECK: vldrb.u8 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x38,0xbe]36# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve37vldrb.u8 q5, [r4, #56]!38 39# CHECK: vldrb.u8 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x38,0xbe]40# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve41vldrb.u8 q5, [r4, #56]!42 43# CHECK: vldrb.u8 q5, [r4], #-25 @ encoding: [0x34,0xec,0x19,0xbe]44# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve45vldrb.u8 q5, [r4], #-2546 47# CHECK: vldrb.u8 q5, [r10], #-25 @ encoding: [0x3a,0xec,0x19,0xbe]48# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve49vldrb.u8 q5, [r10], #-2550 51# CHECK: vldrb.u8 q5, [sp, #-25] @ encoding: [0x1d,0xed,0x19,0xbe]52# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve53vldrb.u8 q5, [sp, #-25]54 55# CHECK: vldrb.u8 q5, [sp, #-127] @ encoding: [0x1d,0xed,0x7f,0xbe]56# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve57vldrb.u8 q5, [sp, #-127]58 59# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction60# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction61vldrb.u8 q0, [r0, #128]62 63# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction64# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction65vldrb.u8 q0, [r0, #-128]!66 67# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction68# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction69vldrb.u8 q0, [r0], #12870 71# CHECK: vstrb.8 q0, [r0] @ encoding: [0x80,0xed,0x00,0x1e]72# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve73vstrb.8 q0, [r0]74 75# CHECK: vstrb.8 q1, [r0] @ encoding: [0x80,0xed,0x00,0x3e]76# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve77vstrb.8 q1, [r0]78 79# CHECK: vstrb.8 q0, [r11] @ encoding: [0x8b,0xed,0x00,0x1e]80# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve81vstrb.8 q0, [r11]82 83# CHECK: vstrb.8 q3, [r11] @ encoding: [0x8b,0xed,0x00,0x7e]84# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve85vstrb.8 q3, [r11]86 87# CHECK: vstrb.8 q0, [r4, #56] @ encoding: [0x84,0xed,0x38,0x1e]88# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve89vstrb.8 q0, [r4, #56]90 91# CHECK: vstrb.8 q4, [r4, #56] @ encoding: [0x84,0xed,0x38,0x9e]92# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve93vstrb.8 q4, [r4, #56]94 95# CHECK: vstrb.8 q0, [r8, #56] @ encoding: [0x88,0xed,0x38,0x1e]96# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve97vstrb.8 q0, [r8, #56]98 99# CHECK: vstrb.8 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x38,0xbe]100# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve101vstrb.8 q5, [r4, #56]!102 103# CHECK: vstrb.8 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x38,0xbe]104# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve105vstrb.8 q5, [r4, #56]!106 107# CHECK: vstrb.8 q5, [r4], #-25 @ encoding: [0x24,0xec,0x19,0xbe]108# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve109vstrb.8 q5, [r4], #-25110 111# CHECK: vstrb.8 q5, [r10], #-25 @ encoding: [0x2a,0xec,0x19,0xbe]112# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve113vstrb.8 q5, [r10], #-25114 115# CHECK: vstrb.8 q5, [sp, #-25] @ encoding: [0x0d,0xed,0x19,0xbe]116# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve117vstrb.8 q5, [sp, #-25]118 119# CHECK: vstrb.8 q5, [sp, #127] @ encoding: [0x8d,0xed,0x7f,0xbe]120# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve121vstrb.8 q5, [sp, #127]122 123# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction124# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction125vstrb.u8 q0, [r0, #128]126 127# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction128# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction129vstrb.u8 q0, [r0, #-128]!130 131# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction132# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction133vstrb.u8 q0, [r0], #128134 135# CHECK: vldrb.u16 q0, [r0] @ encoding: [0x90,0xfd,0x80,0x0e]136# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve137vldrb.u16 q0, [r0]138 139# CHECK: vldrb.u16 q1, [r0] @ encoding: [0x90,0xfd,0x80,0x2e]140# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve141vldrb.u16 q1, [r0]142 143# CHECK: vldrb.u16 q0, [r7] @ encoding: [0x97,0xfd,0x80,0x0e]144# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve145vldrb.u16 q0, [r7]146 147# CHECK: vldrb.u16 q3, [r7] @ encoding: [0x97,0xfd,0x80,0x6e]148# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve149vldrb.u16 q3, [r7]150 151# CHECK: vldrb.u16 q0, [r4, #56] @ encoding: [0x94,0xfd,0xb8,0x0e]152# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve153vldrb.u16 q0, [r4, #56]154 155# CHECK: vldrb.u16 q4, [r4, #56] @ encoding: [0x94,0xfd,0xb8,0x8e]156# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve157vldrb.u16 q4, [r4, #56]158 159# CHECK: vldrb.u16 q0, [r2, #56] @ encoding: [0x92,0xfd,0xb8,0x0e]160# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve161vldrb.u16 q0, [r2, #56]162 163# CHECK: vldrb.u16 q5, [r4, #56]! @ encoding: [0xb4,0xfd,0xb8,0xae]164# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve165vldrb.u16 q5, [r4, #56]!166 167# CHECK: vldrb.u16 q5, [r4, #56]! @ encoding: [0xb4,0xfd,0xb8,0xae]168# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve169vldrb.u16 q5, [r4, #56]!170 171# CHECK: vldrb.u16 q5, [r4], #-1 @ encoding: [0x34,0xfc,0x81,0xae]172# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve173vldrb.u16 q5, [r4], #-1174 175# CHECK: vldrb.u16 q5, [r3], #-25 @ encoding: [0x33,0xfc,0x99,0xae]176# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve177vldrb.u16 q5, [r3], #-25178 179# CHECK: vldrb.u16 q5, [r6, #-25] @ encoding: [0x16,0xfd,0x99,0xae]180# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve181vldrb.u16 q5, [r6, #-25]182 183# CHECK: vldrb.u16 q5, [r6, #-64] @ encoding: [0x16,0xfd,0xc0,0xae]184# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve185vldrb.u16 q5, [r6, #-64]186 187# CHECK: vldrb.s16 q0, [r0] @ encoding: [0x90,0xed,0x80,0x0e]188# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve189vldrb.s16 q0, [r0]190 191# CHECK: vldrb.s16 q1, [r0] @ encoding: [0x90,0xed,0x80,0x2e]192# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve193vldrb.s16 q1, [r0]194 195# CHECK: vldrb.s16 q0, [r7] @ encoding: [0x97,0xed,0x80,0x0e]196# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve197vldrb.s16 q0, [r7]198 199# CHECK: vldrb.s16 q3, [r7] @ encoding: [0x97,0xed,0x80,0x6e]200# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve201vldrb.s16 q3, [r7]202 203# CHECK: vldrb.s16 q0, [r4, #56] @ encoding: [0x94,0xed,0xb8,0x0e]204# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve205vldrb.s16 q0, [r4, #56]206 207# CHECK: vldrb.s16 q4, [r4, #56] @ encoding: [0x94,0xed,0xb8,0x8e]208# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve209vldrb.s16 q4, [r4, #56]210 211# CHECK: vldrb.s16 q0, [r2, #56] @ encoding: [0x92,0xed,0xb8,0x0e]212# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve213vldrb.s16 q0, [r2, #56]214 215# CHECK: vldrb.s16 q5, [r4, #56]! @ encoding: [0xb4,0xed,0xb8,0xae]216# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve217vldrb.s16 q5, [r4, #56]!218 219# CHECK: vldrb.s16 q5, [r4, #56]! @ encoding: [0xb4,0xed,0xb8,0xae]220# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve221vldrb.s16 q5, [r4, #56]!222 223# CHECK: vldrb.s16 q5, [r4], #-25 @ encoding: [0x34,0xec,0x99,0xae]224# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve225vldrb.s16 q5, [r4], #-25226 227# CHECK: vldrb.s16 q5, [r3], #-25 @ encoding: [0x33,0xec,0x99,0xae]228# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve229vldrb.s16 q5, [r3], #-25230 231# CHECK: vldrb.s16 q5, [r6, #-25] @ encoding: [0x16,0xed,0x99,0xae]232# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve233vldrb.s16 q5, [r6, #-25]234 235# CHECK: vldrb.s16 q5, [r6, #-64] @ encoding: [0x16,0xed,0xc0,0xae]236# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve237vldrb.s16 q5, [r6, #-64]238 239# CHECK: vstrb.16 q0, [r0] @ encoding: [0x80,0xed,0x80,0x0e]240# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve241vstrb.16 q0, [r0]242 243# CHECK: vstrb.16 q1, [r0] @ encoding: [0x80,0xed,0x80,0x2e]244# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve245vstrb.16 q1, [r0]246 247# CHECK: vstrb.16 q0, [r7] @ encoding: [0x87,0xed,0x80,0x0e]248# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve249vstrb.16 q0, [r7]250 251# CHECK: vstrb.16 q3, [r7] @ encoding: [0x87,0xed,0x80,0x6e]252# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve253vstrb.16 q3, [r7]254 255# CHECK: vstrb.16 q0, [r4, #56] @ encoding: [0x84,0xed,0xb8,0x0e]256# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve257vstrb.16 q0, [r4, #56]258 259# CHECK: vstrb.16 q4, [r4, #56] @ encoding: [0x84,0xed,0xb8,0x8e]260# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve261vstrb.16 q4, [r4, #56]262 263# CHECK: vstrb.16 q0, [r5, #56] @ encoding: [0x85,0xed,0xb8,0x0e]264# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve265vstrb.16 q0, [r5, #56]266 267# CHECK: vstrb.16 q5, [r4, #56]! @ encoding: [0xa4,0xed,0xb8,0xae]268# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve269vstrb.16 q5, [r4, #56]!270 271# CHECK: vstrb.16 q5, [r4, #56]! @ encoding: [0xa4,0xed,0xb8,0xae]272# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve273vstrb.16 q5, [r4, #56]!274 275# CHECK: vstrb.16 q5, [r4], #-25 @ encoding: [0x24,0xec,0x99,0xae]276# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve277vstrb.16 q5, [r4], #-25278 279# CHECK: vstrb.16 q5, [r3], #-25 @ encoding: [0x23,0xec,0x99,0xae]280# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve281vstrb.16 q5, [r3], #-25282 283# CHECK: vstrb.16 q5, [r2, #-25] @ encoding: [0x02,0xed,0x99,0xae]284# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve285vstrb.16 q5, [r2, #-25]286 287# CHECK: vstrb.16 q5, [r2, #-64] @ encoding: [0x02,0xed,0xc0,0xae]288# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve289vstrb.16 q5, [r2, #-64]290 291# CHECK: vldrb.u32 q0, [r0] @ encoding: [0x90,0xfd,0x00,0x0f]292# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve293vldrb.u32 q0, [r0]294 295# CHECK: vldrb.u32 q1, [r0] @ encoding: [0x90,0xfd,0x00,0x2f]296# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve297vldrb.u32 q1, [r0]298 299# CHECK: vldrb.u32 q0, [r7] @ encoding: [0x97,0xfd,0x00,0x0f]300# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve301vldrb.u32 q0, [r7]302 303# CHECK: vldrb.u32 q3, [r7] @ encoding: [0x97,0xfd,0x00,0x6f]304# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve305vldrb.u32 q3, [r7]306 307# CHECK: vldrb.u32 q0, [r4, #56] @ encoding: [0x94,0xfd,0x38,0x0f]308# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve309vldrb.u32 q0, [r4, #56]310 311# CHECK: vldrb.u32 q4, [r4, #56] @ encoding: [0x94,0xfd,0x38,0x8f]312# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve313vldrb.u32 q4, [r4, #56]314 315# CHECK: vldrb.u32 q0, [r2, #56] @ encoding: [0x92,0xfd,0x38,0x0f]316# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve317vldrb.u32 q0, [r2, #56]318 319# CHECK: vldrb.u32 q5, [r4, #56]! @ encoding: [0xb4,0xfd,0x38,0xaf]320# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve321vldrb.u32 q5, [r4, #56]!322 323# CHECK: vldrb.u32 q5, [r4, #56]! @ encoding: [0xb4,0xfd,0x38,0xaf]324# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve325vldrb.u32 q5, [r4, #56]!326 327# CHECK: vldrb.u32 q5, [r4], #-25 @ encoding: [0x34,0xfc,0x19,0xaf]328# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve329vldrb.u32 q5, [r4], #-25330 331# CHECK: vldrb.u32 q5, [r3], #-25 @ encoding: [0x33,0xfc,0x19,0xaf]332# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve333vldrb.u32 q5, [r3], #-25334 335# CHECK: vldrb.u32 q5, [r6, #-25] @ encoding: [0x16,0xfd,0x19,0xaf]336# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve337vldrb.u32 q5, [r6, #-25]338 339# CHECK: vldrb.u32 q5, [r6, #-64] @ encoding: [0x16,0xfd,0x40,0xaf]340# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve341vldrb.u32 q5, [r6, #-64]342 343# CHECK: vldrb.s32 q0, [r0] @ encoding: [0x90,0xed,0x00,0x0f]344# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve345vldrb.s32 q0, [r0]346 347# CHECK: vldrb.s32 q1, [r0] @ encoding: [0x90,0xed,0x00,0x2f]348# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve349vldrb.s32 q1, [r0]350 351# CHECK: vldrb.s32 q0, [r7] @ encoding: [0x97,0xed,0x00,0x0f]352# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve353vldrb.s32 q0, [r7]354 355# CHECK: vldrb.s32 q3, [r7] @ encoding: [0x97,0xed,0x00,0x6f]356# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve357vldrb.s32 q3, [r7]358 359# CHECK: vldrb.s32 q0, [r4, #56] @ encoding: [0x94,0xed,0x38,0x0f]360# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve361vldrb.s32 q0, [r4, #56]362 363# CHECK: vldrb.s32 q4, [r4, #56] @ encoding: [0x94,0xed,0x38,0x8f]364# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve365vldrb.s32 q4, [r4, #56]366 367# CHECK: vldrb.s32 q0, [r2, #56] @ encoding: [0x92,0xed,0x38,0x0f]368# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve369vldrb.s32 q0, [r2, #56]370 371# CHECK: vldrb.s32 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x38,0xaf]372# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve373vldrb.s32 q5, [r4, #56]!374 375# CHECK: vldrb.s32 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x38,0xaf]376# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve377vldrb.s32 q5, [r4, #56]!378 379# CHECK: vldrb.s32 q5, [r4], #-25 @ encoding: [0x34,0xec,0x19,0xaf]380# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve381vldrb.s32 q5, [r4], #-25382 383# CHECK: vldrb.s32 q5, [r3], #-25 @ encoding: [0x33,0xec,0x19,0xaf]384# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve385vldrb.s32 q5, [r3], #-25386 387# CHECK: vldrb.s32 q5, [r6, #-25] @ encoding: [0x16,0xed,0x19,0xaf]388# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve389vldrb.s32 q5, [r6, #-25]390 391# CHECK: vldrb.s32 q5, [r6, #-64] @ encoding: [0x16,0xed,0x40,0xaf]392# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve393vldrb.s32 q5, [r6, #-64]394 395# CHECK: vstrb.32 q0, [r0] @ encoding: [0x80,0xed,0x00,0x0f]396# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve397vstrb.32 q0, [r0]398 399# CHECK: vstrb.32 q1, [r0] @ encoding: [0x80,0xed,0x00,0x2f]400# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve401vstrb.32 q1, [r0]402 403# CHECK: vstrb.32 q0, [r7] @ encoding: [0x87,0xed,0x00,0x0f]404# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve405vstrb.32 q0, [r7]406 407# CHECK: vstrb.32 q3, [r7] @ encoding: [0x87,0xed,0x00,0x6f]408# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve409vstrb.32 q3, [r7]410 411# CHECK: vstrb.32 q0, [r4, #56] @ encoding: [0x84,0xed,0x38,0x0f]412# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve413vstrb.32 q0, [r4, #56]414 415# CHECK: vstrb.32 q4, [r4, #56] @ encoding: [0x84,0xed,0x38,0x8f]416# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve417vstrb.32 q4, [r4, #56]418 419# CHECK: vstrb.32 q0, [r5, #56] @ encoding: [0x85,0xed,0x38,0x0f]420# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve421vstrb.32 q0, [r5, #56]422 423# CHECK: vstrb.32 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x38,0xaf]424# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve425vstrb.32 q5, [r4, #56]!426 427# CHECK: vstrb.32 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x38,0xaf]428# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve429vstrb.32 q5, [r4, #56]!430 431# CHECK: vstrb.32 q5, [r4], #-25 @ encoding: [0x24,0xec,0x19,0xaf]432# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve433vstrb.32 q5, [r4], #-25434 435# CHECK: vstrb.32 q5, [r3], #-25 @ encoding: [0x23,0xec,0x19,0xaf]436# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve437vstrb.32 q5, [r3], #-25438 439# CHECK: vstrb.32 q5, [r2, #-25] @ encoding: [0x02,0xed,0x19,0xaf]440# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve441vstrb.32 q5, [r2, #-25]442 443# CHECK: vstrb.32 q5, [r2, #-64] @ encoding: [0x02,0xed,0x40,0xaf]444# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve445vstrb.32 q5, [r2, #-64]446 447# CHECK: vldrh.u16 q0, [r0] @ encoding: [0x90,0xed,0x80,0x1e]448# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve449vldrh.u16 q0, [r0]450 451# CHECK: vldrh.u16 q1, [r0] @ encoding: [0x90,0xed,0x80,0x3e]452# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve453vldrh.u16 q1, [r0]454 455# CHECK: vldrh.u16 q0, [r11] @ encoding: [0x9b,0xed,0x80,0x1e]456# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve457vldrh.u16 q0, [r11]458 459# CHECK: vldrh.u16 q3, [r11] @ encoding: [0x9b,0xed,0x80,0x7e]460# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve461vldrh.u16 q3, [r11]462 463# CHECK: vldrh.u16 q0, [r4, #56] @ encoding: [0x94,0xed,0x9c,0x1e]464# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve465vldrh.u16 q0, [r4, #56]466 467# CHECK: vldrh.u16 q4, [r4, #56] @ encoding: [0x94,0xed,0x9c,0x9e]468# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve469vldrh.u16 q4, [r4, #56]470 471# CHECK: vldrh.u16 q0, [r8, #56] @ encoding: [0x98,0xed,0x9c,0x1e]472# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve473vldrh.u16 q0, [r8, #56]474 475# CHECK: vldrh.u16 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x9c,0xbe]476# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve477vldrh.u16 q5, [r4, #56]!478 479# CHECK: vldrh.u16 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x9c,0xbe]480# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve481vldrh.u16 q5, [r4, #56]!482 483# CHECK: vldrh.u16 q5, [r4], #-26 @ encoding: [0x34,0xec,0x8d,0xbe]484# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve485vldrh.u16 q5, [r4], #-26486 487# CHECK: vldrh.u16 q5, [r10], #-26 @ encoding: [0x3a,0xec,0x8d,0xbe]488# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve489vldrh.u16 q5, [r10], #-26490 491# CHECK: vldrh.u16 q5, [sp, #-26] @ encoding: [0x1d,0xed,0x8d,0xbe]492# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve493vldrh.u16 q5, [sp, #-26]494 495# CHECK: vldrh.u16 q5, [sp, #-64] @ encoding: [0x1d,0xed,0xa0,0xbe]496# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve497vldrh.u16 q5, [sp, #-64]498 499# CHECK: vldrh.u16 q5, [sp, #-254] @ encoding: [0x1d,0xed,0xff,0xbe]500# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve501vldrh.u16 q5, [sp, #-254]502 503# CHECK: vldrh.u16 q5, [r10], #254 @ encoding: [0xba,0xec,0xff,0xbe]504# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve505vldrh.u16 q5, [r10], #254506 507# CHECK: vstrh.16 q0, [r0] @ encoding: [0x80,0xed,0x80,0x1e]508# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve509vstrh.16 q0, [r0]510 511# CHECK: vstrh.16 q1, [r0] @ encoding: [0x80,0xed,0x80,0x3e]512# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve513vstrh.16 q1, [r0]514 515# CHECK: vstrh.16 q0, [r11] @ encoding: [0x8b,0xed,0x80,0x1e]516# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve517vstrh.16 q0, [r11]518 519# CHECK: vstrh.16 q3, [r11] @ encoding: [0x8b,0xed,0x80,0x7e]520# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve521vstrh.16 q3, [r11]522 523# CHECK: vstrh.16 q0, [r4, #56] @ encoding: [0x84,0xed,0x9c,0x1e]524# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve525vstrh.16 q0, [r4, #56]526 527# CHECK: vstrh.16 q4, [r4, #56] @ encoding: [0x84,0xed,0x9c,0x9e]528# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve529vstrh.16 q4, [r4, #56]530 531# CHECK: vstrh.16 q0, [r8, #56] @ encoding: [0x88,0xed,0x9c,0x1e]532# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve533vstrh.16 q0, [r8, #56]534 535# CHECK: vstrh.16 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x9c,0xbe]536# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve537vstrh.16 q5, [r4, #56]!538 539# CHECK: vstrh.16 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x9c,0xbe]540# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve541vstrh.16 q5, [r4, #56]!542 543# CHECK: vstrh.16 q5, [r4], #-26 @ encoding: [0x24,0xec,0x8d,0xbe]544# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve545vstrh.16 q5, [r4], #-26546 547# CHECK: vstrh.16 q5, [r10], #-26 @ encoding: [0x2a,0xec,0x8d,0xbe]548# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve549vstrh.16 q5, [r10], #-26550 551# CHECK: vstrh.16 q5, [sp, #-26] @ encoding: [0x0d,0xed,0x8d,0xbe]552# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve553vstrh.16 q5, [sp, #-26]554 555# CHECK: vstrh.16 q5, [sp, #-64] @ encoding: [0x0d,0xed,0xa0,0xbe]556# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve557vstrh.16 q5, [sp, #-64]558 559# CHECK: vstrh.16 q5, [sp, #-254] @ encoding: [0x0d,0xed,0xff,0xbe]560# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve561vstrh.16 q5, [sp, #-254]562 563# CHECK: vstrh.16 q5, [r10], #254 @ encoding: [0xaa,0xec,0xff,0xbe]564# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve565vstrh.16 q5, [r10], #254566 567# CHECK: vldrh.u32 q0, [r0] @ encoding: [0x98,0xfd,0x00,0x0f]568# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve569vldrh.u32 q0, [r0]570 571# CHECK: vldrh.u32 q1, [r0] @ encoding: [0x98,0xfd,0x00,0x2f]572# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve573vldrh.u32 q1, [r0]574 575# CHECK: vldrh.u32 q0, [r7] @ encoding: [0x9f,0xfd,0x00,0x0f]576# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve577vldrh.u32 q0, [r7]578 579# CHECK: vldrh.u32 q3, [r7] @ encoding: [0x9f,0xfd,0x00,0x6f]580# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve581vldrh.u32 q3, [r7]582 583# CHECK: vldrh.u32 q0, [r4, #56] @ encoding: [0x9c,0xfd,0x1c,0x0f]584# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve585vldrh.u32 q0, [r4, #56]586 587# CHECK: vldrh.u32 q4, [r4, #56] @ encoding: [0x9c,0xfd,0x1c,0x8f]588# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve589vldrh.u32 q4, [r4, #56]590 591# CHECK: vldrh.u32 q0, [r2, #56] @ encoding: [0x9a,0xfd,0x1c,0x0f]592# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve593vldrh.u32 q0, [r2, #56]594 595# CHECK: vldrh.u32 q5, [r4, #56]! @ encoding: [0xbc,0xfd,0x1c,0xaf]596# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve597vldrh.u32 q5, [r4, #56]!598 599# CHECK: vldrh.u32 q5, [r4, #56]! @ encoding: [0xbc,0xfd,0x1c,0xaf]600# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve601vldrh.u32 q5, [r4, #56]!602 603# CHECK: vldrh.u32 q5, [r4], #-26 @ encoding: [0x3c,0xfc,0x0d,0xaf]604# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve605vldrh.u32 q5, [r4], #-26606 607# CHECK: vldrh.u32 q5, [r3], #-26 @ encoding: [0x3b,0xfc,0x0d,0xaf]608# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve609vldrh.u32 q5, [r3], #-26610 611# CHECK: vldrh.u32 q5, [r6, #-26] @ encoding: [0x1e,0xfd,0x0d,0xaf]612# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve613vldrh.u32 q5, [r6, #-26]614 615# CHECK: vldrh.u32 q5, [r6, #-64] @ encoding: [0x1e,0xfd,0x20,0xaf]616# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve617vldrh.u32 q5, [r6, #-64]618 619# CHECK: vldrh.u32 q5, [r6, #-254] @ encoding: [0x1e,0xfd,0x7f,0xaf]620# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve621vldrh.u32 q5, [r6, #-254]622 623# CHECK: vldrh.u32 q5, [r4, #254]! @ encoding: [0xbc,0xfd,0x7f,0xaf]624# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve625vldrh.u32 q5, [r4, #254]!626 627# CHECK: vldrh.s32 q0, [r0] @ encoding: [0x98,0xed,0x00,0x0f]628# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve629vldrh.s32 q0, [r0]630 631# CHECK: vldrh.s32 q1, [r0] @ encoding: [0x98,0xed,0x00,0x2f]632# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve633vldrh.s32 q1, [r0]634 635# CHECK: vldrh.s32 q0, [r7] @ encoding: [0x9f,0xed,0x00,0x0f]636# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve637vldrh.s32 q0, [r7]638 639# CHECK: vldrh.s32 q3, [r7] @ encoding: [0x9f,0xed,0x00,0x6f]640# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve641vldrh.s32 q3, [r7]642 643# CHECK: vldrh.s32 q0, [r4, #56] @ encoding: [0x9c,0xed,0x1c,0x0f]644# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve645vldrh.s32 q0, [r4, #56]646 647# CHECK: vldrh.s32 q4, [r4, #56] @ encoding: [0x9c,0xed,0x1c,0x8f]648# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve649vldrh.s32 q4, [r4, #56]650 651# CHECK: vldrh.s32 q0, [r2, #56] @ encoding: [0x9a,0xed,0x1c,0x0f]652# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve653vldrh.s32 q0, [r2, #56]654 655# CHECK: vldrh.s32 q5, [r4, #56]! @ encoding: [0xbc,0xed,0x1c,0xaf]656# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve657vldrh.s32 q5, [r4, #56]!658 659# CHECK: vldrh.s32 q5, [r4, #56]! @ encoding: [0xbc,0xed,0x1c,0xaf]660# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve661vldrh.s32 q5, [r4, #56]!662 663# CHECK: vldrh.s32 q5, [r4], #-26 @ encoding: [0x3c,0xec,0x0d,0xaf]664# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve665vldrh.s32 q5, [r4], #-26666 667# CHECK: vldrh.s32 q5, [r3], #-26 @ encoding: [0x3b,0xec,0x0d,0xaf]668# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve669vldrh.s32 q5, [r3], #-26670 671# CHECK: vldrh.s32 q5, [r6, #-26] @ encoding: [0x1e,0xed,0x0d,0xaf]672# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve673vldrh.s32 q5, [r6, #-26]674 675# CHECK: vldrh.s32 q5, [r6, #-64] @ encoding: [0x1e,0xed,0x20,0xaf]676# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve677vldrh.s32 q5, [r6, #-64]678 679# CHECK: vldrh.s32 q5, [r6, #-254] @ encoding: [0x1e,0xed,0x7f,0xaf]680# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve681vldrh.s32 q5, [r6, #-254]682 683# CHECK: vldrh.s32 q5, [r4, #254]! @ encoding: [0xbc,0xed,0x7f,0xaf]684# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve685vldrh.s32 q5, [r4, #254]!686 687# CHECK: vstrh.32 q0, [r0] @ encoding: [0x88,0xed,0x00,0x0f]688# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve689vstrh.32 q0, [r0]690 691# CHECK: vstrh.32 q1, [r0] @ encoding: [0x88,0xed,0x00,0x2f]692# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve693vstrh.32 q1, [r0]694 695# CHECK: vstrh.32 q0, [r7] @ encoding: [0x8f,0xed,0x00,0x0f]696# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve697vstrh.32 q0, [r7]698 699# CHECK: vstrh.32 q3, [r7] @ encoding: [0x8f,0xed,0x00,0x6f]700# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve701vstrh.32 q3, [r7]702 703# CHECK: vstrh.32 q0, [r4, #56] @ encoding: [0x8c,0xed,0x1c,0x0f]704# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve705vstrh.32 q0, [r4, #56]706 707# CHECK: vstrh.32 q4, [r4, #56] @ encoding: [0x8c,0xed,0x1c,0x8f]708# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve709vstrh.32 q4, [r4, #56]710 711# CHECK: vstrh.32 q0, [r5, #56] @ encoding: [0x8d,0xed,0x1c,0x0f]712# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve713vstrh.32 q0, [r5, #56]714 715# CHECK: vstrh.32 q5, [r4, #56]! @ encoding: [0xac,0xed,0x1c,0xaf]716# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve717vstrh.32 q5, [r4, #56]!718 719# CHECK: vstrh.32 q5, [r4, #56]! @ encoding: [0xac,0xed,0x1c,0xaf]720# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve721vstrh.32 q5, [r4, #56]!722 723# CHECK: vstrh.32 q5, [r4], #-26 @ encoding: [0x2c,0xec,0x0d,0xaf]724# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve725vstrh.32 q5, [r4], #-26726 727# CHECK: vstrh.32 q5, [r3], #-26 @ encoding: [0x2b,0xec,0x0d,0xaf]728# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve729vstrh.32 q5, [r3], #-26730 731# CHECK: vstrh.32 q5, [r2, #-26] @ encoding: [0x0a,0xed,0x0d,0xaf]732# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve733vstrh.32 q5, [r2, #-26]734 735# CHECK: vstrh.32 q5, [r2, #-64] @ encoding: [0x0a,0xed,0x20,0xaf]736# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve737vstrh.32 q5, [r2, #-64]738 739# CHECK: vstrh.32 q5, [r2, #-254] @ encoding: [0x0a,0xed,0x7f,0xaf]740# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve741vstrh.32 q5, [r2, #-254]742 743# CHECK: vstrh.32 q5, [r4, #254]! @ encoding: [0xac,0xed,0x7f,0xaf]744# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve745vstrh.32 q5, [r4, #254]!746 747# CHECK: vldrw.u32 q0, [r0] @ encoding: [0x90,0xed,0x00,0x1f]748# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve749vldrw.u32 q0, [r0]750 751# CHECK: vldrw.u32 q1, [r0] @ encoding: [0x90,0xed,0x00,0x3f]752# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve753vldrw.u32 q1, [r0]754 755# CHECK: vldrw.u32 q0, [r11] @ encoding: [0x9b,0xed,0x00,0x1f]756# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve757vldrw.u32 q0, [r11]758 759# CHECK: vldrw.u32 q3, [r11] @ encoding: [0x9b,0xed,0x00,0x7f]760# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve761vldrw.u32 q3, [r11]762 763# CHECK: vldrw.u32 q0, [r4, #56] @ encoding: [0x94,0xed,0x0e,0x1f]764# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve765vldrw.u32 q0, [r4, #56]766 767# CHECK: vldrw.u32 q4, [r4, #56] @ encoding: [0x94,0xed,0x0e,0x9f]768# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve769vldrw.u32 q4, [r4, #56]770 771# CHECK: vldrw.u32 q0, [r8, #56] @ encoding: [0x98,0xed,0x0e,0x1f]772# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve773vldrw.u32 q0, [r8, #56]774 775# CHECK: vldrw.u32 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x0e,0xbf]776# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve777vldrw.u32 q5, [r4, #56]!778 779# CHECK: vldrw.u32 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x0e,0xbf]780# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve781vldrw.u32 q5, [r4, #56]!782 783# CHECK: vldrw.u32 q5, [r4], #-28 @ encoding: [0x34,0xec,0x07,0xbf]784# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve785vldrw.u32 q5, [r4], #-28786 787# CHECK: vldrw.u32 q5, [r10], #-28 @ encoding: [0x3a,0xec,0x07,0xbf]788# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve789vldrw.u32 q5, [r10], #-28790 791# CHECK: vldrw.u32 q5, [sp, #-28] @ encoding: [0x1d,0xed,0x07,0xbf]792# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve793vldrw.u32 q5, [sp, #-28]794 795# CHECK: vldrw.u32 q5, [sp, #-64] @ encoding: [0x1d,0xed,0x10,0xbf]796# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve797vldrw.u32 q5, [sp, #-64]798 799# CHECK: vldrw.u32 q5, [sp, #-508] @ encoding: [0x1d,0xed,0x7f,0xbf]800# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve801vldrw.u32 q5, [sp, #-508]802 803# CHECK: vldrw.u32 q5, [r4, #508]! @ encoding: [0xb4,0xed,0x7f,0xbf]804# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve805vldrw.u32 q5, [r4, #508]!806 807# CHECK: vstrw.32 q0, [r0] @ encoding: [0x80,0xed,0x00,0x1f]808# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve809vstrw.32 q0, [r0]810 811# CHECK: vstrw.32 q1, [r0] @ encoding: [0x80,0xed,0x00,0x3f]812# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve813vstrw.32 q1, [r0]814 815# CHECK: vstrw.32 q0, [r11] @ encoding: [0x8b,0xed,0x00,0x1f]816# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve817vstrw.32 q0, [r11]818 819# CHECK: vstrw.32 q3, [r11] @ encoding: [0x8b,0xed,0x00,0x7f]820# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve821vstrw.32 q3, [r11]822 823# CHECK: vstrw.32 q0, [r4, #56] @ encoding: [0x84,0xed,0x0e,0x1f]824# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve825vstrw.32 q0, [r4, #56]826 827# CHECK: vstrw.32 q4, [r4, #56] @ encoding: [0x84,0xed,0x0e,0x9f]828# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve829vstrw.32 q4, [r4, #56]830 831# CHECK: vstrw.32 q0, [r8, #56] @ encoding: [0x88,0xed,0x0e,0x1f]832# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve833vstrw.32 q0, [r8, #56]834 835# CHECK: vstrw.32 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x0e,0xbf]836# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve837vstrw.32 q5, [r4, #56]!838 839# CHECK: vstrw.32 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x0e,0xbf]840# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve841vstrw.32 q5, [r4, #56]!842 843# CHECK: vstrw.32 q5, [r4], #-28 @ encoding: [0x24,0xec,0x07,0xbf]844# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve845vstrw.32 q5, [r4], #-28846 847# CHECK: vstrw.32 q5, [r10], #-28 @ encoding: [0x2a,0xec,0x07,0xbf]848# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve849vstrw.32 q5, [r10], #-28850 851# CHECK: vstrw.32 q5, [sp, #-28] @ encoding: [0x0d,0xed,0x07,0xbf]852# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve853vstrw.32 q5, [sp, #-28]854 855# CHECK: vstrw.32 q5, [sp, #-64] @ encoding: [0x0d,0xed,0x10,0xbf]856# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve857vstrw.32 q5, [sp, #-64]858 859# CHECK: vstrw.32 q5, [sp, #-508] @ encoding: [0x0d,0xed,0x7f,0xbf]860# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve861vstrw.32 q5, [sp, #-508]862 863# CHECK: vstrw.32 q5, [r4, #508]! @ encoding: [0xa4,0xed,0x7f,0xbf]864# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve865vstrw.32 q5, [r4, #508]!866 867# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction868# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction869vstrb.16 q0, [r8]870 871# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction872# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction873vldrh.u32 q0, [r8]874 875# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction876# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction877vstrw.32 q5, [sp, #-64]!878 879# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction880# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction881vstrw.32 q5, [sp, #-3]882 883# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction884# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction885vstrw.32 q5, [sp, #512]886 887# CHECK: vldrb.u8 q0, [r0, q1] @ encoding: [0x90,0xfc,0x02,0x0e]888# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve889vldrb.u8 q0, [r0, q1]890 891# CHECK: vldrb.u8 q3, [r10, q1] @ encoding: [0x9a,0xfc,0x02,0x6e]892# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve893vldrb.u8 q3, [r10, q1]894 895# CHECK: vldrb.u16 q0, [r0, q1] @ encoding: [0x90,0xfc,0x82,0x0e]896# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve897vldrb.u16 q0, [r0, q1]898 899# CHECK: vldrb.u16 q3, [r9, q1] @ encoding: [0x99,0xfc,0x82,0x6e]900# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve901vldrb.u16 q3, [r9, q1]902 903# CHECK: vldrb.s16 q0, [r0, q1] @ encoding: [0x90,0xec,0x82,0x0e]904# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve905vldrb.s16 q0, [r0, q1]906 907# CHECK: vldrb.s16 q3, [sp, q1] @ encoding: [0x9d,0xec,0x82,0x6e]908# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve909vldrb.s16 q3, [sp, q1]910 911# CHECK: vldrb.u32 q0, [r0, q1] @ encoding: [0x90,0xfc,0x02,0x0f]912# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve913vldrb.u32 q0, [r0, q1]914 915# CHECK: vldrb.u32 q3, [r0, q1] @ encoding: [0x90,0xfc,0x02,0x6f]916# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve917vldrb.u32 q3, [r0, q1]918 919# CHECK: vldrb.s32 q0, [r0, q1] @ encoding: [0x90,0xec,0x02,0x0f]920# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve921vldrb.s32 q0, [r0, q1]922 923# CHECK: vldrb.s32 q3, [r0, q1] @ encoding: [0x90,0xec,0x02,0x6f]924# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve925vldrb.s32 q3, [r0, q1]926 927# CHECK: vldrh.u16 q0, [r0, q1] @ encoding: [0x90,0xfc,0x92,0x0e]928# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve929vldrh.u16 q0, [r0, q1]930 931# CHECK: vldrh.u16 q3, [r0, q1] @ encoding: [0x90,0xfc,0x92,0x6e]932# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve933vldrh.u16 q3, [r0, q1]934 935# CHECK: vldrh.u32 q0, [r0, q1] @ encoding: [0x90,0xfc,0x12,0x0f]936# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve937vldrh.u32 q0, [r0, q1]938 939# CHECK: vldrh.u32 q3, [r0, q1] @ encoding: [0x90,0xfc,0x12,0x6f]940# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve941vldrh.u32 q3, [r0, q1]942 943# CHECK: vldrh.s32 q0, [r0, q1] @ encoding: [0x90,0xec,0x12,0x0f]944# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve945vldrh.s32 q0, [r0, q1]946 947# CHECK: vldrh.s32 q3, [r0, q1] @ encoding: [0x90,0xec,0x12,0x6f]948# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve949vldrh.s32 q3, [r0, q1]950 951# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical952# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve953vldrb.u8 q0, [r0, q0]954 955# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical956# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve957vldrb.u16 q0, [r0, q0]958 959# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical960# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve961vldrb.s16 q0, [r0, q0]962 963# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical964# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve965vldrb.u32 q0, [r0, q0]966 967# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical968# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve969vldrb.s32 q0, [r0, q0]970 971# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical972# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve973vldrh.u16 q0, [r0, q0]974 975# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical976# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve977vldrh.u32 q0, [r0, q0]978 979# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical980# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve981vldrh.s32 q0, [r0, q0]982 983# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical984# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve985vldrh.u16 q0, [r0, q0, uxtw #1]986 987# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical988# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve989vldrh.u32 q0, [r0, q0, uxtw #1]990 991# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical992# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve993vldrh.s32 q0, [r0, q0, uxtw #1]994 995# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical996# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve997vldrw.u32 q0, [r0, q0]998 999# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical1000# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1001vldrw.u32 q0, [r0, q0, uxtw #2]1002 1003# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical1004# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1005vldrd.u64 q0, [r0, q0]1006 1007# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector offset register can't be identical1008# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1009vldrd.u64 q0, [r0, q0, uxtw #3]1010 1011# CHECK: vldrh.u16 q0, [r0, q1, uxtw #1] @ encoding: [0x90,0xfc,0x93,0x0e]1012# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1013vldrh.u16 q0, [r0, q1, uxtw #1]1014 1015# CHECK: vldrw.u32 q0, [r0, q1] @ encoding: [0x90,0xfc,0x42,0x0f]1016# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1017vldrw.u32 q0, [r0, q1]1018 1019# CHECK: vldrw.u32 q3, [r0, q1] @ encoding: [0x90,0xfc,0x42,0x6f]1020# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1021vldrw.u32 q3, [r0, q1]1022 1023# CHECK: vldrw.u32 q0, [r0, q1, uxtw #2] @ encoding: [0x90,0xfc,0x43,0x0f]1024# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1025vldrw.u32 q0, [r0, q1, uxtw #2]1026 1027# CHECK: vldrw.u32 q0, [sp, q1, uxtw #2] @ encoding: [0x9d,0xfc,0x43,0x0f]1028# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1029vldrw.u32 q0, [sp, q1, uxtw #2]1030 1031# CHECK: vldrd.u64 q0, [r0, q1] @ encoding: [0x90,0xfc,0xd2,0x0f]1032# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1033vldrd.u64 q0, [r0, q1]1034 1035# CHECK: vldrd.u64 q3, [r0, q1] @ encoding: [0x90,0xfc,0xd2,0x6f]1036# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1037vldrd.u64 q3, [r0, q1]1038 1039# CHECK: vldrd.u64 q0, [r0, q1, uxtw #3] @ encoding: [0x90,0xfc,0xd3,0x0f]1040# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1041vldrd.u64 q0, [r0, q1, uxtw #3]1042 1043# CHECK: vldrd.u64 q0, [sp, q1, uxtw #3] @ encoding: [0x9d,0xfc,0xd3,0x0f]1044# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1045vldrd.u64 q0, [sp, q1, uxtw #3]1046 1047# CHECK: vstrb.8 q0, [r0, q1] @ encoding: [0x80,0xec,0x02,0x0e]1048# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1049vstrb.8 q0, [r0, q1]1050 1051# CHECK: vstrb.8 q3, [r10, q1] @ encoding: [0x8a,0xec,0x02,0x6e]1052# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1053vstrb.8 q3, [r10, q1]1054 1055# CHECK: vstrb.8 q3, [r0, q3] @ encoding: [0x80,0xec,0x06,0x6e]1056# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1057vstrb.8 q3, [r0, q3]1058 1059# CHECK: vstrb.16 q0, [r0, q1] @ encoding: [0x80,0xec,0x82,0x0e]1060# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1061vstrb.16 q0, [r0, q1]1062 1063# CHECK: vstrb.16 q3, [sp, q1] @ encoding: [0x8d,0xec,0x82,0x6e]1064# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1065vstrb.16 q3, [sp, q1]1066 1067# CHECK: vstrb.16 q3, [r0, q3] @ encoding: [0x80,0xec,0x86,0x6e]1068# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1069vstrb.16 q3, [r0, q3]1070 1071# CHECK: vstrb.32 q0, [r0, q1] @ encoding: [0x80,0xec,0x02,0x0f]1072# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1073vstrb.32 q0, [r0, q1]1074 1075# CHECK: vstrb.32 q3, [r0, q1] @ encoding: [0x80,0xec,0x02,0x6f]1076# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1077vstrb.32 q3, [r0, q1]1078 1079# CHECK: vstrb.32 q3, [r0, q3] @ encoding: [0x80,0xec,0x06,0x6f]1080# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1081vstrb.32 q3, [r0, q3]1082 1083# CHECK: vstrh.16 q0, [r0, q1] @ encoding: [0x80,0xec,0x92,0x0e]1084# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1085vstrh.16 q0, [r0, q1]1086 1087# CHECK: vstrh.16 q3, [r0, q1] @ encoding: [0x80,0xec,0x92,0x6e]1088# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1089vstrh.16 q3, [r0, q1]1090 1091# CHECK: vstrh.16 q3, [r0, q3] @ encoding: [0x80,0xec,0x96,0x6e]1092# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1093vstrh.16 q3, [r0, q3]1094 1095# CHECK: vstrh.32 q0, [r0, q1] @ encoding: [0x80,0xec,0x12,0x0f]1096# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1097vstrh.32 q0, [r0, q1]1098 1099# CHECK: vstrh.32 q3, [r0, q1] @ encoding: [0x80,0xec,0x12,0x6f]1100# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1101vstrh.32 q3, [r0, q1]1102 1103# CHECK: vstrh.32 q3, [r0, q3] @ encoding: [0x80,0xec,0x16,0x6f]1104# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1105vstrh.32 q3, [r0, q3]1106 1107# CHECK: vstrh.16 q0, [r0, q1, uxtw #1] @ encoding: [0x80,0xec,0x93,0x0e]1108# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1109vstrh.16 q0, [r0, q1, uxtw #1]1110 1111# CHECK: vstrh.32 q3, [r8, q3, uxtw #1] @ encoding: [0x88,0xec,0x17,0x6f]1112# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1113vstrh.32 q3, [r8, q3, uxtw #1]1114 1115# CHECK: vstrw.32 q0, [r0, q1] @ encoding: [0x80,0xec,0x42,0x0f]1116# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1117vstrw.32 q0, [r0, q1]1118 1119# CHECK: vstrw.32 q3, [r0, q1] @ encoding: [0x80,0xec,0x42,0x6f]1120# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1121vstrw.32 q3, [r0, q1]1122 1123# CHECK: vstrw.32 q3, [r0, q3] @ encoding: [0x80,0xec,0x46,0x6f]1124# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1125vstrw.32 q3, [r0, q3]1126 1127# CHECK: vstrw.32 q0, [r0, q1, uxtw #2] @ encoding: [0x80,0xec,0x43,0x0f]1128# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1129vstrw.32 q0, [r0, q1, uxtw #2]1130 1131# CHECK: vstrw.32 q0, [sp, q1, uxtw #2] @ encoding: [0x8d,0xec,0x43,0x0f]1132# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1133vstrw.32 q0, [sp, q1, uxtw #2]1134 1135# CHECK: vstrd.64 q0, [r0, q1] @ encoding: [0x80,0xec,0xd2,0x0f]1136# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1137vstrd.64 q0, [r0, q1]1138 1139# CHECK: vstrd.64 q3, [r0, q1] @ encoding: [0x80,0xec,0xd2,0x6f]1140# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1141vstrd.64 q3, [r0, q1]1142 1143# CHECK: vstrd.64 q3, [r0, q3] @ encoding: [0x80,0xec,0xd6,0x6f]1144# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1145vstrd.64 q3, [r0, q3]1146 1147# CHECK: vstrd.64 q0, [r0, q1, uxtw #3] @ encoding: [0x80,0xec,0xd3,0x0f]1148# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1149vstrd.64 q0, [r0, q1, uxtw #3]1150 1151# CHECK: vstrd.64 q0, [sp, q1, uxtw #3] @ encoding: [0x8d,0xec,0xd3,0x0f]1152# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1153vstrd.64 q0, [sp, q1, uxtw #3]1154 1155# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: operand must be a register in range [q0, q7]1156# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1157vstrw.32 q9, [sp, q1, uxtw #2]1158 1159# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1160# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1161vstrh.16 q3, [pc, q1]1162 1163# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1164# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1165vstrd.64 q0, [r0, q1, uxtw #1]1166 1167# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1168# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1169vldrd.u64 q0, [r0, q1, uxtw #1]1170 1171# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1172# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1173vstrd.64 q0, [r0, q1, uxtw #2]1174 1175# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1176# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1177vldrd.u64 q0, [r0, q1, uxtw #2]1178 1179# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1180# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1181vldrw.u32 q0, [r0, q1, uxtw #1]1182 1183# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1184# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1185vstrh.16 q0, [r0, q1, uxtw #2]1186 1187# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1188# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1189vstrb.32 q0, [r11, q1, uxtw #1]1190 1191# CHECK: vldrw.u32 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1e]1192# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1193vldrw.u32 q0, [q1]1194 1195# CHECK: vldrw.u32 q7, [q1] @ encoding: [0x92,0xfd,0x00,0xfe]1196# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1197vldrw.u32 q7, [q1]1198 1199# CHECK: vldrw.u32 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xfe]1200# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1201vldrw.u32 q7, [q1]!1202 1203# CHECK: vldrw.u32 q7, [q1, #4] @ encoding: [0x92,0xfd,0x01,0xfe]1204# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1205vldrw.u32 q7, [q1, #4]1206 1207# CHECK: vldrw.u32 q7, [q1, #-4] @ encoding: [0x12,0xfd,0x01,0xfe]1208# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1209vldrw.u32 q7, [q1, #-4]1210 1211# CHECK: vldrw.u32 q7, [q1, #508] @ encoding: [0x92,0xfd,0x7f,0xfe]1212# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1213vldrw.u32 q7, [q1, #508]1214 1215# CHECK: vldrw.u32 q7, [q1, #-508] @ encoding: [0x12,0xfd,0x7f,0xfe]1216# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1217vldrw.u32 q7, [q1, #-508]1218 1219# CHECK: vldrw.u32 q7, [q1, #264] @ encoding: [0x92,0xfd,0x42,0xfe]1220# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1221vldrw.u32 q7, [q1, #264]1222 1223# CHECK: vldrw.u32 q7, [q1, #4]! @ encoding: [0xb2,0xfd,0x01,0xfe]1224# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1225vldrw.u32 q7, [q1, #4]!1226 1227# CHECK: vstrw.32 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1e]1228# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1229vstrw.32 q0, [q1]1230 1231# CHECK: vstrw.32 q1, [q1] @ encoding: [0x82,0xfd,0x00,0x3e]1232# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1233vstrw.32 q1, [q1]1234 1235# CHECK: vstrw.32 q7, [q1] @ encoding: [0x82,0xfd,0x00,0xfe]1236# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1237vstrw.32 q7, [q1]1238 1239# CHECK: vstrw.32 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xfe]1240# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1241vstrw.32 q7, [q1]!1242 1243# CHECK: vstrw.32 q7, [q7] @ encoding: [0x8e,0xfd,0x00,0xfe]1244# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1245vstrw.32 q7, [q7]1246 1247# CHECK: vstrw.32 q7, [q1, #4] @ encoding: [0x82,0xfd,0x01,0xfe]1248# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1249vstrw.32 q7, [q1, #4]1250 1251# CHECK: vstrw.32 q7, [q1, #-4] @ encoding: [0x02,0xfd,0x01,0xfe]1252# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1253vstrw.32 q7, [q1, #-4]1254 1255# CHECK: vstrw.32 q7, [q1, #508] @ encoding: [0x82,0xfd,0x7f,0xfe]1256# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1257vstrw.32 q7, [q1, #508]1258 1259# CHECK: vstrw.32 q7, [q1, #-508] @ encoding: [0x02,0xfd,0x7f,0xfe]1260# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1261vstrw.32 q7, [q1, #-508]1262 1263# CHECK: vstrw.32 q7, [q1, #264]! @ encoding: [0xa2,0xfd,0x42,0xfe]1264# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1265vstrw.32 q7, [q1, #264]!1266 1267# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: operand must be a register in range [q0, q7]1268# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1269vstrw.32 q8, [q1]!1270 1271# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1272# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1273vstrw.32 q4, [q1, #3]!1274 1275# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1276# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1277vldrw.u32 q7, [q1, #512]1278 1279# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector pointer register can't be identical1280# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1281vldrw.32 q1, [q1, #264]1282 1283# CHECK: vldrd.u64 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1f]1284# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1285vldrd.u64 q0, [q1]1286 1287# CHECK: vldrd.u64 q7, [q1] @ encoding: [0x92,0xfd,0x00,0xff]1288# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1289vldrd.u64 q7, [q1]1290 1291# CHECK: vldrd.u64 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xff]1292# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1293vldrd.u64 q7, [q1]!1294 1295# CHECK: vldrd.u64 q7, [q1, #8] @ encoding: [0x92,0xfd,0x01,0xff]1296# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1297vldrd.u64 q7, [q1, #8]1298 1299# CHECK: vldrd.u64 q7, [q1, #-8] @ encoding: [0x12,0xfd,0x01,0xff]1300# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1301vldrd.u64 q7, [q1, #-8]1302 1303# CHECK: vldrd.u64 q7, [q1, #1016] @ encoding: [0x92,0xfd,0x7f,0xff]1304# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1305vldrd.u64 q7, [q1, #1016]1306 1307# CHECK: vldrd.u64 q7, [q1, #-1016] @ encoding: [0x12,0xfd,0x7f,0xff]1308# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1309vldrd.u64 q7, [q1, #-1016]1310 1311# CHECK: vldrd.u64 q7, [q1, #264] @ encoding: [0x92,0xfd,0x21,0xff]1312# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1313vldrd.u64 q7, [q1, #264]1314 1315# CHECK: vldrd.u64 q7, [q1, #624] @ encoding: [0x92,0xfd,0x4e,0xff]1316# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1317vldrd.u64 q7, [q1, #624]1318 1319# CHECK: vldrd.u64 q7, [q1, #264] @ encoding: [0x92,0xfd,0x21,0xff]1320# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1321vldrd.u64 q7, [q1, #264]1322 1323# CHECK: vldrd.u64 q7, [q1, #-1016]! @ encoding: [0x32,0xfd,0x7f,0xff]1324# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1325vldrd.u64 q7, [q1, #-1016]!1326 1327# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: destination vector register and vector pointer register can't be identical1328# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1329vldrd.u64 q6, [q6]1330 1331# CHECK: vstrd.64 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1f]1332# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1333vstrd.64 q0, [q1]1334 1335# CHECK: vstrd.64 q1, [q1] @ encoding: [0x82,0xfd,0x00,0x3f]1336# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1337vstrd.64 q1, [q1]1338 1339# CHECK: vstrd.64 q7, [q1] @ encoding: [0x82,0xfd,0x00,0xff]1340# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1341vstrd.64 q7, [q1]1342 1343# CHECK: vstrd.64 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xff]1344# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1345vstrd.64 q7, [q1]!1346 1347# CHECK: vstrd.64 q7, [q7] @ encoding: [0x8e,0xfd,0x00,0xff]1348# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1349vstrd.64 q7, [q7]1350 1351# CHECK: vstrd.64 q7, [q1, #8] @ encoding: [0x82,0xfd,0x01,0xff]1352# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1353vstrd.64 q7, [q1, #8]1354 1355# CHECK: vstrd.64 q7, [q1, #-8]! @ encoding: [0x22,0xfd,0x01,0xff]1356# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1357vstrd.64 q7, [q1, #-8]!1358 1359# CHECK: vstrd.64 q7, [q1, #1016] @ encoding: [0x82,0xfd,0x7f,0xff]1360# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1361vstrd.64 q7, [q1, #1016]1362 1363# CHECK: vstrd.64 q7, [q1, #-1016] @ encoding: [0x02,0xfd,0x7f,0xff]1364# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1365vstrd.64 q7, [q1, #-1016]1366 1367# CHECK: vstrd.64 q7, [q1, #264] @ encoding: [0x82,0xfd,0x21,0xff]1368# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1369vstrd.64 q7, [q1, #264]1370 1371# CHECK: vstrd.64 q7, [q1, #624] @ encoding: [0x82,0xfd,0x4e,0xff]1372# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1373vstrd.64 q7, [q1, #624]1374 1375# CHECK: vstrd.64 q7, [q1, #264] @ encoding: [0x82,0xfd,0x21,0xff]1376# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1377vstrd.64 q7, [q1, #264]1378 1379# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: operand must be a register in range [q0, q7]1380# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1381vldrd.u64 q8, [q1]!1382 1383# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1384# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1385vstrd.64 q7, [q1, #1024]1386 1387# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1388# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1389vstrd.64 q4, [q1, #3]1390 1391# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: invalid operand for instruction1392# ERROR-NOMVE: [[@LINE+1]]:1: error: invalid instruction1393vstrd.64 q4, [q1, #4]1394 1395# CHECK: vldrb.u8 q0, [r0] @ encoding: [0x90,0xed,0x00,0x1e]1396# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1397vldrb.s8 q0, [r0]1398 1399# CHECK: vldrb.u8 q0, [r0] @ encoding: [0x90,0xed,0x00,0x1e]1400# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1401vldrb.8 q0, [r0]1402 1403# CHECK: vldrb.u8 q0, [r8, #56] @ encoding: [0x98,0xed,0x38,0x1e]1404# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1405vldrb.s8 q0, [r8, #56]1406 1407# CHECK: vldrb.u8 q0, [r8, #56] @ encoding: [0x98,0xed,0x38,0x1e]1408# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1409vldrb.8 q0, [r8, #56]1410 1411# CHECK: vldrb.u8 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x38,0xbe]1412# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1413vldrb.s8 q5, [r4, #56]!1414 1415# CHECK: vldrb.u8 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x38,0xbe]1416# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1417vldrb.8 q5, [r4, #56]!1418 1419# CHECK: vstrb.8 q0, [r0] @ encoding: [0x80,0xed,0x00,0x1e]1420# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1421vstrb.u8 q0, [r0]1422 1423# CHECK: vstrb.8 q0, [r0] @ encoding: [0x80,0xed,0x00,0x1e]1424# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1425vstrb.s8 q0, [r0]1426 1427# CHECK: vstrb.8 q4, [r4, #56] @ encoding: [0x84,0xed,0x38,0x9e]1428# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1429vstrb.u8 q4, [r4, #56]1430 1431# CHECK: vstrb.8 q4, [r4, #56] @ encoding: [0x84,0xed,0x38,0x9e]1432# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1433vstrb.s8 q4, [r4, #56]1434 1435# CHECK: vstrb.8 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x38,0xbe]1436# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1437vstrb.u8 q5, [r4, #56]!1438 1439# CHECK: vstrb.8 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x38,0xbe]1440# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1441vstrb.s8 q5, [r4, #56]!1442 1443# CHECK: vldrh.u16 q0, [r0] @ encoding: [0x90,0xed,0x80,0x1e]1444# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1445vldrh.s16 q0, [r0]1446 1447# CHECK: vldrh.u16 q0, [r0] @ encoding: [0x90,0xed,0x80,0x1e]1448# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1449vldrh.f16 q0, [r0]1450 1451# CHECK: vldrh.u16 q0, [r0] @ encoding: [0x90,0xed,0x80,0x1e]1452# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1453vldrh.16 q0, [r0]1454 1455# CHECK: vldrh.u16 q0, [r4, #56] @ encoding: [0x94,0xed,0x9c,0x1e]1456# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1457vldrh.s16 q0, [r4, #56]1458 1459# CHECK: vldrh.u16 q0, [r4, #56] @ encoding: [0x94,0xed,0x9c,0x1e]1460# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1461vldrh.f16 q0, [r4, #56]1462 1463# CHECK: vldrh.u16 q0, [r4, #56] @ encoding: [0x94,0xed,0x9c,0x1e]1464# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1465vldrh.16 q0, [r4, #56]1466 1467# CHECK: vldrh.u16 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x9c,0xbe]1468# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1469vldrh.s16 q5, [r4, #56]!1470 1471# CHECK: vldrh.u16 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x9c,0xbe]1472# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1473vldrh.f16 q5, [r4, #56]!1474 1475# CHECK: vldrh.u16 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x9c,0xbe]1476# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1477vldrh.16 q5, [r4, #56]!1478 1479# CHECK: vstrh.16 q0, [r0] @ encoding: [0x80,0xed,0x80,0x1e]1480# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1481vstrh.u16 q0, [r0]1482 1483# CHECK: vstrh.16 q0, [r0] @ encoding: [0x80,0xed,0x80,0x1e]1484# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1485vstrh.s16 q0, [r0]1486 1487# CHECK: vstrh.16 q0, [r0] @ encoding: [0x80,0xed,0x80,0x1e]1488# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1489vstrh.f16 q0, [r0]1490 1491# CHECK: vstrh.16 q0, [r4, #56] @ encoding: [0x84,0xed,0x9c,0x1e]1492# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1493vstrh.u16 q0, [r4, #56]1494 1495# CHECK: vstrh.16 q0, [r4, #56] @ encoding: [0x84,0xed,0x9c,0x1e]1496# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1497vstrh.s16 q0, [r4, #56]1498 1499# CHECK: vstrh.16 q0, [r4, #56] @ encoding: [0x84,0xed,0x9c,0x1e]1500# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1501vstrh.f16 q0, [r4, #56]1502 1503# CHECK: vstrh.16 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x9c,0xbe]1504# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1505vstrh.u16 q5, [r4, #56]!1506 1507# CHECK: vstrh.16 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x9c,0xbe]1508# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1509vstrh.s16 q5, [r4, #56]!1510 1511# CHECK: vstrh.16 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x9c,0xbe]1512# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1513vstrh.f16 q5, [r4, #56]!1514 1515# CHECK: vldrw.u32 q0, [r0] @ encoding: [0x90,0xed,0x00,0x1f]1516# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1517vldrw.s32 q0, [r0]1518 1519# CHECK: vldrw.u32 q0, [r0] @ encoding: [0x90,0xed,0x00,0x1f]1520# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1521vldrw.f32 q0, [r0]1522 1523# CHECK: vldrw.u32 q0, [r0] @ encoding: [0x90,0xed,0x00,0x1f]1524# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1525vldrw.32 q0, [r0]1526 1527# CHECK: vldrw.u32 q0, [r4, #56] @ encoding: [0x94,0xed,0x0e,0x1f]1528# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1529vldrw.s32 q0, [r4, #56]1530 1531# CHECK: vldrw.u32 q0, [r4, #56] @ encoding: [0x94,0xed,0x0e,0x1f]1532# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1533vldrw.f32 q0, [r4, #56]1534 1535# CHECK: vldrw.u32 q0, [r4, #56] @ encoding: [0x94,0xed,0x0e,0x1f]1536# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1537vldrw.32 q0, [r4, #56]1538 1539# CHECK: vldrw.u32 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x0e,0xbf]1540# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1541vldrw.s32 q5, [r4, #56]!1542 1543# CHECK: vldrw.u32 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x0e,0xbf]1544# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1545vldrw.f32 q5, [r4, #56]!1546 1547# CHECK: vldrw.u32 q5, [r4, #56]! @ encoding: [0xb4,0xed,0x0e,0xbf]1548# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1549vldrw.32 q5, [r4, #56]!1550 1551# CHECK: vstrw.32 q0, [r0] @ encoding: [0x80,0xed,0x00,0x1f]1552# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1553vstrw.u32 q0, [r0]1554 1555# CHECK: vstrw.32 q0, [r0] @ encoding: [0x80,0xed,0x00,0x1f]1556# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1557vstrw.s32 q0, [r0]1558 1559# CHECK: vstrw.32 q0, [r0] @ encoding: [0x80,0xed,0x00,0x1f]1560# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1561vstrw.f32 q0, [r0]1562 1563# CHECK: vstrw.32 q0, [r4, #56] @ encoding: [0x84,0xed,0x0e,0x1f]1564# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1565vstrw.u32 q0, [r4, #56]1566 1567# CHECK: vstrw.32 q0, [r4, #56] @ encoding: [0x84,0xed,0x0e,0x1f]1568# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1569vstrw.s32 q0, [r4, #56]1570 1571# CHECK: vstrw.32 q0, [r4, #56] @ encoding: [0x84,0xed,0x0e,0x1f]1572# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1573vstrw.f32 q0, [r4, #56]1574 1575# CHECK: vstrw.32 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x0e,0xbf]1576# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1577vstrw.u32 q5, [r4, #56]!1578 1579# CHECK: vstrw.32 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x0e,0xbf]1580# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1581vstrw.s32 q5, [r4, #56]!1582 1583# CHECK: vstrw.32 q5, [r4, #56]! @ encoding: [0xa4,0xed,0x0e,0xbf]1584# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1585vstrw.f32 q5, [r4, #56]!1586 1587# CHECK: vldrb.u8 q0, [r0, q1] @ encoding: [0x90,0xfc,0x02,0x0e]1588# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1589vldrb.s8 q0, [r0, q1]1590 1591# CHECK: vldrb.u8 q0, [r0, q1] @ encoding: [0x90,0xfc,0x02,0x0e]1592# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1593vldrb.8 q0, [r0, q1]1594 1595# CHECK: vldrh.u16 q3, [r0, q1] @ encoding: [0x90,0xfc,0x92,0x6e]1596# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1597vldrh.s16 q3, [r0, q1]1598 1599# CHECK: vldrh.u16 q3, [r0, q1] @ encoding: [0x90,0xfc,0x92,0x6e]1600# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1601vldrh.f16 q3, [r0, q1]1602 1603# CHECK: vldrh.u16 q3, [r0, q1] @ encoding: [0x90,0xfc,0x92,0x6e]1604# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1605vldrh.16 q3, [r0, q1]1606 1607# CHECK: vldrh.u16 q0, [r0, q1, uxtw #1] @ encoding: [0x90,0xfc,0x93,0x0e]1608# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1609vldrh.s16 q0, [r0, q1, uxtw #1]1610 1611# CHECK: vldrh.u16 q0, [r0, q1, uxtw #1] @ encoding: [0x90,0xfc,0x93,0x0e]1612# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1613vldrh.f16 q0, [r0, q1, uxtw #1]1614 1615# CHECK: vldrh.u16 q0, [r0, q1, uxtw #1] @ encoding: [0x90,0xfc,0x93,0x0e]1616# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1617vldrh.16 q0, [r0, q1, uxtw #1]1618 1619# CHECK: vldrw.u32 q0, [r0, q1] @ encoding: [0x90,0xfc,0x42,0x0f]1620# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1621vldrw.s32 q0, [r0, q1]1622 1623# CHECK: vldrw.u32 q0, [r0, q1] @ encoding: [0x90,0xfc,0x42,0x0f]1624# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1625vldrw.f32 q0, [r0, q1]1626 1627# CHECK: vldrw.u32 q0, [r0, q1] @ encoding: [0x90,0xfc,0x42,0x0f]1628# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1629vldrw.32 q0, [r0, q1]1630 1631# CHECK: vldrw.u32 q0, [r0, q1, uxtw #2] @ encoding: [0x90,0xfc,0x43,0x0f]1632# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1633vldrw.s32 q0, [r0, q1, uxtw #2]1634 1635# CHECK: vldrw.u32 q0, [r0, q1, uxtw #2] @ encoding: [0x90,0xfc,0x43,0x0f]1636# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1637vldrw.f32 q0, [r0, q1, uxtw #2]1638 1639# CHECK: vldrw.u32 q0, [r0, q1, uxtw #2] @ encoding: [0x90,0xfc,0x43,0x0f]1640# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1641vldrw.32 q0, [r0, q1, uxtw #2]1642 1643# CHECK: vldrd.u64 q0, [r0, q1] @ encoding: [0x90,0xfc,0xd2,0x0f]1644# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1645vldrd.s64 q0, [r0, q1]1646 1647# CHECK: vldrd.u64 q0, [r0, q1] @ encoding: [0x90,0xfc,0xd2,0x0f]1648# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1649vldrd.f64 q0, [r0, q1]1650 1651# CHECK: vldrd.u64 q0, [r0, q1] @ encoding: [0x90,0xfc,0xd2,0x0f]1652# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1653vldrd.64 q0, [r0, q1]1654 1655# CHECK: vldrd.u64 q0, [r0, q1, uxtw #3] @ encoding: [0x90,0xfc,0xd3,0x0f]1656# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1657vldrd.s64 q0, [r0, q1, uxtw #3]1658 1659# CHECK: vldrd.u64 q0, [r0, q1, uxtw #3] @ encoding: [0x90,0xfc,0xd3,0x0f]1660# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1661vldrd.f64 q0, [r0, q1, uxtw #3]1662 1663# CHECK: vldrd.u64 q0, [r0, q1, uxtw #3] @ encoding: [0x90,0xfc,0xd3,0x0f]1664# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1665vldrd.64 q0, [r0, q1, uxtw #3]1666 1667# CHECK: vstrb.8 q0, [r0, q1] @ encoding: [0x80,0xec,0x02,0x0e]1668# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1669vstrb.u8 q0, [r0, q1]1670 1671# CHECK: vstrb.8 q0, [r0, q1] @ encoding: [0x80,0xec,0x02,0x0e]1672# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1673vstrb.s8 q0, [r0, q1]1674 1675# CHECK: vstrh.16 q3, [r0, q1] @ encoding: [0x80,0xec,0x92,0x6e]1676# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1677vstrh.u16 q3, [r0, q1]1678 1679# CHECK: vstrh.16 q3, [r0, q1] @ encoding: [0x80,0xec,0x92,0x6e]1680# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1681vstrh.s16 q3, [r0, q1]1682 1683# CHECK: vstrh.16 q3, [r0, q1] @ encoding: [0x80,0xec,0x92,0x6e]1684# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1685vstrh.f16 q3, [r0, q1]1686 1687# CHECK: vstrh.16 q0, [r0, q1, uxtw #1] @ encoding: [0x80,0xec,0x93,0x0e]1688# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1689vstrh.u16 q0, [r0, q1, uxtw #1]1690 1691# CHECK: vstrh.16 q0, [r0, q1, uxtw #1] @ encoding: [0x80,0xec,0x93,0x0e]1692# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1693vstrh.s16 q0, [r0, q1, uxtw #1]1694 1695# CHECK: vstrh.16 q0, [r0, q1, uxtw #1] @ encoding: [0x80,0xec,0x93,0x0e]1696# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1697vstrh.f16 q0, [r0, q1, uxtw #1]1698 1699# CHECK: vstrw.32 q0, [r0, q1] @ encoding: [0x80,0xec,0x42,0x0f]1700# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1701vstrw.u32 q0, [r0, q1]1702 1703# CHECK: vstrw.32 q0, [r0, q1] @ encoding: [0x80,0xec,0x42,0x0f]1704# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1705vstrw.s32 q0, [r0, q1]1706 1707# CHECK: vstrw.32 q0, [r0, q1] @ encoding: [0x80,0xec,0x42,0x0f]1708# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1709vstrw.f32 q0, [r0, q1]1710 1711# CHECK: vstrw.32 q0, [r0, q1, uxtw #2] @ encoding: [0x80,0xec,0x43,0x0f]1712# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1713vstrw.u32 q0, [r0, q1, uxtw #2]1714 1715# CHECK: vstrw.32 q0, [r0, q1, uxtw #2] @ encoding: [0x80,0xec,0x43,0x0f]1716# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1717vstrw.s32 q0, [r0, q1, uxtw #2]1718 1719# CHECK: vstrw.32 q0, [r0, q1, uxtw #2] @ encoding: [0x80,0xec,0x43,0x0f]1720# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1721vstrw.f32 q0, [r0, q1, uxtw #2]1722 1723# CHECK: vstrd.64 q3, [r0, q1] @ encoding: [0x80,0xec,0xd2,0x6f]1724# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1725vstrd.u64 q3, [r0, q1]1726 1727# CHECK: vstrd.64 q3, [r0, q1] @ encoding: [0x80,0xec,0xd2,0x6f]1728# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1729vstrd.s64 q3, [r0, q1]1730 1731# CHECK: vstrd.64 q3, [r0, q1] @ encoding: [0x80,0xec,0xd2,0x6f]1732# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1733vstrd.f64 q3, [r0, q1]1734 1735# CHECK: vstrd.64 q0, [r0, q1, uxtw #3] @ encoding: [0x80,0xec,0xd3,0x0f]1736# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1737vstrd.u64 q0, [r0, q1, uxtw #3]1738 1739# CHECK: vstrd.64 q0, [r0, q1, uxtw #3] @ encoding: [0x80,0xec,0xd3,0x0f]1740# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1741vstrd.s64 q0, [r0, q1, uxtw #3]1742 1743# CHECK: vstrd.64 q0, [r0, q1, uxtw #3] @ encoding: [0x80,0xec,0xd3,0x0f]1744# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1745vstrd.f64 q0, [r0, q1, uxtw #3]1746 1747# CHECK: vldrw.u32 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1e]1748# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1749vldrw.s32 q0, [q1]1750 1751# CHECK: vldrw.u32 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1e]1752# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1753vldrw.f32 q0, [q1]1754 1755# CHECK: vldrw.u32 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1e]1756# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1757vldrw.32 q0, [q1]1758 1759# CHECK: vldrw.u32 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xfe]1760# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1761vldrw.s32 q7, [q1]!1762 1763# CHECK: vldrw.u32 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xfe]1764# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1765vldrw.f32 q7, [q1]!1766 1767# CHECK: vldrw.u32 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xfe]1768# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1769vldrw.32 q7, [q1]!1770 1771# CHECK: vldrw.u32 q7, [q1, #4] @ encoding: [0x92,0xfd,0x01,0xfe]1772# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1773vldrw.s32 q7, [q1, #4]1774 1775# CHECK: vldrw.u32 q7, [q1, #4] @ encoding: [0x92,0xfd,0x01,0xfe]1776# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1777vldrw.f32 q7, [q1, #4]1778 1779# CHECK: vldrw.u32 q7, [q1, #4] @ encoding: [0x92,0xfd,0x01,0xfe]1780# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1781vldrw.32 q7, [q1, #4]1782 1783# CHECK: vldrw.u32 q7, [q1, #4]! @ encoding: [0xb2,0xfd,0x01,0xfe]1784# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1785vldrw.s32 q7, [q1, #4]!1786 1787# CHECK: vldrw.u32 q7, [q1, #4]! @ encoding: [0xb2,0xfd,0x01,0xfe]1788# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1789vldrw.f32 q7, [q1, #4]!1790 1791# CHECK: vldrw.u32 q7, [q1, #4]! @ encoding: [0xb2,0xfd,0x01,0xfe]1792# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1793vldrw.u32 q7, [q1, #4]!1794 1795# CHECK: vstrw.32 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1e]1796# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1797vstrw.u32 q0, [q1]1798 1799# CHECK: vstrw.32 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1e]1800# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1801vstrw.s32 q0, [q1]1802 1803# CHECK: vstrw.32 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1e]1804# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1805vstrw.f32 q0, [q1]1806 1807# CHECK: vstrw.32 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xfe]1808# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1809vstrw.u32 q7, [q1]!1810 1811# CHECK: vstrw.32 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xfe]1812# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1813vstrw.s32 q7, [q1]!1814 1815# CHECK: vstrw.32 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xfe]1816# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1817vstrw.f32 q7, [q1]!1818 1819# CHECK: vstrw.32 q7, [q1, #508] @ encoding: [0x82,0xfd,0x7f,0xfe]1820# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1821vstrw.u32 q7, [q1, #508]1822 1823# CHECK: vstrw.32 q7, [q1, #508] @ encoding: [0x82,0xfd,0x7f,0xfe]1824# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1825vstrw.s32 q7, [q1, #508]1826 1827# CHECK: vstrw.32 q7, [q1, #508] @ encoding: [0x82,0xfd,0x7f,0xfe]1828# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1829vstrw.f32 q7, [q1, #508]1830 1831# CHECK: vstrw.32 q7, [q1, #264]! @ encoding: [0xa2,0xfd,0x42,0xfe]1832# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1833vstrw.u32 q7, [q1, #264]!1834 1835# CHECK: vstrw.32 q7, [q1, #264]! @ encoding: [0xa2,0xfd,0x42,0xfe]1836# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1837vstrw.s32 q7, [q1, #264]!1838 1839# CHECK: vstrw.32 q7, [q1, #264]! @ encoding: [0xa2,0xfd,0x42,0xfe]1840# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1841vstrw.f32 q7, [q1, #264]!1842 1843# CHECK: vldrd.u64 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1f]1844# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1845vldrd.s64 q0, [q1]1846 1847# CHECK: vldrd.u64 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1f]1848# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1849vldrd.f64 q0, [q1]1850 1851# CHECK: vldrd.u64 q0, [q1] @ encoding: [0x92,0xfd,0x00,0x1f]1852# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1853vldrd.64 q0, [q1]1854 1855# CHECK: vldrd.u64 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xff]1856# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1857vldrd.s64 q7, [q1]!1858 1859# CHECK: vldrd.u64 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xff]1860# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1861vldrd.f64 q7, [q1]!1862 1863# CHECK: vldrd.u64 q7, [q1]! @ encoding: [0xb2,0xfd,0x00,0xff]1864# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1865vldrd.64 q7, [q1]!1866 1867# CHECK: vldrd.u64 q7, [q1, #8] @ encoding: [0x92,0xfd,0x01,0xff]1868# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1869vldrd.s64 q7, [q1, #8]1870 1871# CHECK: vldrd.u64 q7, [q1, #8] @ encoding: [0x92,0xfd,0x01,0xff]1872# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1873vldrd.f64 q7, [q1, #8]1874 1875# CHECK: vldrd.u64 q7, [q1, #8] @ encoding: [0x92,0xfd,0x01,0xff]1876# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1877vldrd.64 q7, [q1, #8]1878 1879# CHECK: vldrd.u64 q7, [q1, #-1016]! @ encoding: [0x32,0xfd,0x7f,0xff]1880# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1881vldrd.s64 q7, [q1, #-1016]!1882 1883# CHECK: vldrd.u64 q7, [q1, #-1016]! @ encoding: [0x32,0xfd,0x7f,0xff]1884# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1885vldrd.f64 q7, [q1, #-1016]!1886 1887# CHECK: vldrd.u64 q7, [q1, #-1016]! @ encoding: [0x32,0xfd,0x7f,0xff]1888# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1889vldrd.64 q7, [q1, #-1016]!1890 1891# CHECK: vstrd.64 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1f]1892# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1893vstrd.u64 q0, [q1]1894 1895# CHECK: vstrd.64 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1f]1896# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1897vstrd.s64 q0, [q1]1898 1899# CHECK: vstrd.64 q0, [q1] @ encoding: [0x82,0xfd,0x00,0x1f]1900# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1901vstrd.f64 q0, [q1]1902 1903# CHECK: vstrd.64 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xff]1904# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1905vstrd.u64 q7, [q1]!1906 1907# CHECK: vstrd.64 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xff]1908# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1909vstrd.s64 q7, [q1]!1910 1911# CHECK: vstrd.64 q7, [q1]! @ encoding: [0xa2,0xfd,0x00,0xff]1912# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1913vstrd.f64 q7, [q1]!1914 1915# CHECK: vstrd.64 q7, [q1, #1016] @ encoding: [0x82,0xfd,0x7f,0xff]1916# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1917vstrd.u64 q7, [q1, #1016]1918 1919# CHECK: vstrd.64 q7, [q1, #1016] @ encoding: [0x82,0xfd,0x7f,0xff]1920# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1921vstrd.s64 q7, [q1, #1016]1922 1923# CHECK: vstrd.64 q7, [q1, #1016] @ encoding: [0x82,0xfd,0x7f,0xff]1924# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1925vstrd.f64 q7, [q1, #1016]1926 1927# CHECK: vstrd.64 q7, [q1, #-8]! @ encoding: [0x22,0xfd,0x01,0xff]1928# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1929vstrd.u64 q7, [q1, #-8]!1930 1931# CHECK: vstrd.64 q7, [q1, #-8]! @ encoding: [0x22,0xfd,0x01,0xff]1932# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1933vstrd.s64 q7, [q1, #-8]!1934 1935# CHECK: vstrd.64 q7, [q1, #-8]! @ encoding: [0x22,0xfd,0x01,0xff]1936# ERROR-NOMVE: [[@LINE+1]]:1: error: instruction requires: mve1937vstrd.f64 q7, [q1, #-8]!1938 1939vpste1940vstrwt.f32 q7, [q1, #264]!1941vldrde.64 q7, [q1, #8]1942# CHECK: vpste @ encoding: [0x71,0xfe,0x4d,0x8f]1943# CHECK: vstrwt.32 q7, [q1, #264]! @ encoding: [0xa2,0xfd,0x42,0xfe]1944# CHECK: vldrde.u64 q7, [q1, #8] @ encoding: [0x92,0xfd,0x01,0xff]1945