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1@ RUN: not llvm-mc < %s -triple thumbv8-unknown-unknown -show-encoding -mattr=-fp64,-fpregs64,-neon 2> %t > %t22@ RUN: FileCheck %s < %t --check-prefix=CHECK-ERRORS3@ RUN: FileCheck %s < %t24 5 vadd.f64 d0, d1, d26 vsub.f64 d2, d3, d47 vdiv.f64 d4, d5, d68 vmul.f64 d6, d7, d89 vnmul.f64 d8, d9, d1010@ CHECK-ERRORS: error: instruction requires: double precision VFP11@ CHECK-ERRORS-NEXT: vadd.f64 d0, d1, d212@ CHECK-ERRORS: error: instruction requires: double precision VFP13@ CHECK-ERRORS-NEXT: vsub.f64 d2, d3, d414@ CHECK-ERRORS: error: instruction requires: double precision VFP15@ CHECK-ERRORS-NEXT: vdiv.f64 d4, d5, d616@ CHECK-ERRORS: error: instruction requires: double precision VFP17@ CHECK-ERRORS-NEXT: vmul.f64 d6, d7, d818@ CHECK-ERRORS: error: instruction requires: double precision VFP19@ CHECK-ERRORS-NEXT: vnmul.f64 d8, d9, d1020 21 vmla.f64 d11, d10, d922 vmls.f64 d8, d7, d623 vnmla.f64 d5, d4, d324 vnmls.f64 d2, d1, d025 vfma.f64 d1, d2, d326 vfms.f64 d4, d5, d627 vfnma.f64 d7, d8, d928 vfnms.f64 d10, d11, d1229@ CHECK-ERRORS: error: instruction requires: double precision VFP30@ CHECK-ERRORS-NEXT: vmla.f64 d11, d10, d931@ CHECK-ERRORS: error: instruction requires: double precision VFP32@ CHECK-ERRORS-NEXT: vmls.f64 d8, d7, d633@ CHECK-ERRORS: error: instruction requires: double precision VFP34@ CHECK-ERRORS-NEXT: vnmla.f64 d5, d4, d335@ CHECK-ERRORS: error: instruction requires: double precision VFP36@ CHECK-ERRORS-NEXT: vnmls.f64 d2, d1, d037@ CHECK-ERRORS: error: instruction requires: double precision VFP38@ CHECK-ERRORS-NEXT: vfma.f64 d1, d2, d339@ CHECK-ERRORS: error: instruction requires: double precision VFP40@ CHECK-ERRORS-NEXT: vfms.f64 d4, d5, d641@ CHECK-ERRORS: error: instruction requires: double precision VFP42@ CHECK-ERRORS-NEXT: vfnma.f64 d7, d8, d943@ CHECK-ERRORS: error: instruction requires: double precision VFP44@ CHECK-ERRORS-NEXT: vfnms.f64 d10, d11, d1245 46 vneg.f64 d15, d1447 vsqrt.f64 d13, d1248 vsqrt d13, d1449@ CHECK-ERRORS: error: instruction requires: double precision VFP50@ CHECK-ERRORS-NEXT: vneg.f64 d15, d1451@ CHECK-ERRORS: error: instruction requires: double precision VFP52@ CHECK-ERRORS-NEXT: vsqrt.f64 d13, d1253@ CHECK-ERRORS: error: instruction requires: double precision VFP54@ CHECK-ERRORS-NEXT: vsqrt d13, d1455 56 vcmpe.f64 d0, d157 vcmp.f64 d2, d358 vabs.f64 d4, d559 vcmpe.f64 d5, #060 vcmp.f64 d6, #061@ CHECK-ERRORS: error: instruction requires: double precision VFP62@ CHECK-ERRORS-NEXT: vcmpe.f64 d0, d163@ CHECK-ERRORS: error: instruction requires: double precision VFP64@ CHECK-ERRORS-NEXT: vcmp.f64 d2, d365@ CHECK-ERRORS: error: instruction requires: double precision VFP66@ CHECK-ERRORS-NEXT: vabs.f64 d4, d567@ CHECK-ERRORS: error: instruction requires: double precision VFP68@ CHECK-ERRORS-NEXT: vcmpe.f64 d5, #069@ CHECK-ERRORS: error: instruction requires: double precision VFP70@ CHECK-ERRORS-NEXT: vcmp.f64 d6, #071 72 @ FIXME: overlapping aliases and a probable TableGen indeterminacy mean73 @ that the actual reason can vary by platform.74 vmov.f64 d11, d1075@ CHECK-ERRORS: instruction requires: 64-bit fp registers76@ CHECK-ERRORS-NEXT: vmov.f64 d11, d1077 78 vcvt.f64.s32 d9, s879 vcvt.f64.u32 d7, s680 vcvt.s32.f64 s5, d481 vcvt.u32.f64 s3, d282 vcvtr.s32.f64 s1, d083 vcvtr.u32.f64 s1, d284 vcvt.s16.f64 d3, d4, #185 vcvt.u16.f64 d5, d6, #286 vcvt.s32.f64 d7, d8, #387 vcvt.u32.f64 d9, d10, #488 vcvt.f64.s16 d11, d12, #389 vcvt.f64.u16 d13, d14, #290 vcvt.f64.s32 d15, d14, #191 vcvt.f64.u32 d13, d12, #192@ CHECK-ERRORS: error: instruction requires: double precision VFP93@ CHECK-ERRORS-NEXT: vcvt.f64.s32 d9, s894@ CHECK-ERRORS: error: instruction requires: double precision VFP95@ CHECK-ERRORS-NEXT: vcvt.f64.u32 d7, s696@ CHECK-ERRORS: error: instruction requires: double precision VFP97@ CHECK-ERRORS-NEXT: vcvt.s32.f64 s5, d498@ CHECK-ERRORS: error: instruction requires: double precision VFP99@ CHECK-ERRORS-NEXT: vcvt.u32.f64 s3, d2100@ CHECK-ERRORS: error: instruction requires: double precision VFP101@ CHECK-ERRORS-NEXT: vcvtr.s32.f64 s1, d0102@ CHECK-ERRORS: error: instruction requires: double precision VFP103@ CHECK-ERRORS-NEXT: vcvtr.u32.f64 s1, d2104@ CHECK-ERRORS: error: instruction requires: double precision VFP105@ CHECK-ERRORS-NEXT: vcvt.s16.f64 d3, d4, #1106@ CHECK-ERRORS: error: instruction requires: double precision VFP107@ CHECK-ERRORS-NEXT: vcvt.u16.f64 d5, d6, #2108@ CHECK-ERRORS: error: instruction requires: double precision VFP109@ CHECK-ERRORS-NEXT: vcvt.s32.f64 d7, d8, #3110@ CHECK-ERRORS: error: instruction requires: double precision VFP111@ CHECK-ERRORS-NEXT: vcvt.u32.f64 d9, d10, #4112@ CHECK-ERRORS: error: instruction requires: double precision VFP113@ CHECK-ERRORS-NEXT: vcvt.f64.s16 d11, d12, #3114@ CHECK-ERRORS: error: instruction requires: double precision VFP115@ CHECK-ERRORS-NEXT: vcvt.f64.u16 d13, d14, #2116@ CHECK-ERRORS: error: instruction requires: double precision VFP117@ CHECK-ERRORS-NEXT: vcvt.f64.s32 d15, d14, #1118@ CHECK-ERRORS: error: instruction requires: double precision VFP119@ CHECK-ERRORS-NEXT: vcvt.f64.u32 d13, d12, #1120 121 @ v8 operations, also double precision so make sure they're rejected.122 vselgt.f64 d0, d1, d2123 vselge.f64 d3, d4, d5124 vseleq.f64 d6, d7, d8125 vselvs.f64 d9, d10, d11126@ CHECK-ERRORS: error: instruction requires: double precision VFP127@ CHECK-ERRORS-NEXT: vselgt.f64 d0, d1, d2128@ CHECK-ERRORS: error: instruction requires: double precision VFP129@ CHECK-ERRORS-NEXT: vselge.f64 d3, d4, d5130@ CHECK-ERRORS: error: instruction requires: double precision VFP131@ CHECK-ERRORS-NEXT: vseleq.f64 d6, d7, d8132@ CHECK-ERRORS: error: instruction requires: double precision VFP133@ CHECK-ERRORS-NEXT: vselvs.f64 d9, d10, d11134 135 vmaxnm.f64 d12, d13, d14136@ CHECK-ERRORS: error: instruction requires: double precision VFP137@ CHECK-ERRORS-NEXT: vmaxnm.f64 d12, d13, d14138 139 vcvtb.f64.f16 d7, s8140 vcvtb.f16.f64 s9, d10141 vcvtt.f64.f16 d11, s12142 vcvtt.f16.f64 s13, d14143@ CHECK-ERRORS: error: instruction requires: double precision VFP144@ CHECK-ERRORS-NEXT: vcvtb.f64.f16 d7, s8145@ CHECK-ERRORS: error: instruction requires: double precision VFP146@ CHECK-ERRORS-NEXT: vcvtb.f16.f64 s9, d10147@ CHECK-ERRORS: error: instruction requires: double precision VFP148@ CHECK-ERRORS-NEXT: vcvtt.f64.f16 d11, s12149@ CHECK-ERRORS: error: instruction requires: double precision VFP150@ CHECK-ERRORS-NEXT: vcvtt.f16.f64 s13, d14151 152 vrintz.f64 d15, d14153 vrintr.f64.f64 d13, d12154 vrintx.f64 d11, d10155 vrinta.f64.f64 d9, d8156 vrintn.f64 d7, d6157 vrintp.f64.f64 d5, d4158 vrintm.f64 d3, d2159@ CHECK-ERRORS: error: instruction requires: double precision VFP160@ CHECK-ERRORS-NEXT: vrintz.f64 d15, d14161@ CHECK-ERRORS: error: instruction requires: double precision VFP162@ CHECK-ERRORS-NEXT: vrintr.f64.f64 d13, d12163@ CHECK-ERRORS: error: instruction requires: double precision VFP164@ CHECK-ERRORS-NEXT: vrintx.f64 d11, d10165@ CHECK-ERRORS: error: instruction requires: double precision VFP166@ CHECK-ERRORS-NEXT: vrinta.f64.f64 d9, d8167@ CHECK-ERRORS: error: instruction requires: double precision VFP168@ CHECK-ERRORS-NEXT: vrintn.f64 d7, d6169@ CHECK-ERRORS: error: instruction requires: double precision VFP170@ CHECK-ERRORS-NEXT: vrintp.f64.f64 d5, d4171@ CHECK-ERRORS: error: instruction requires: double precision VFP172@ CHECK-ERRORS-NEXT: vrintm.f64 d3, d2173 174 vstm r4, {}175 vstm r4, {d15-d30}176 vstm r4, {d15-d31}177 vstm r4, {s15-s31}178 vldm r4, {d15-d30}179 vldm r4, {d15-d31}180 vldm r4, {s15-s31}181@ CHECK-ERRORS: error: register expected182@ CHECK: vstmia r4, {d15, d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30}183@ CHECK-ERRORS: error: list of registers must be at least 1 and at most 16184@ CHECK: vstmia r4, {s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}185@ CHECK: vldmia r4, {d15, d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30}186@ CHECK-ERRORS: error: list of registers must be at least 1 and at most 16187@ CHECK: vldmia r4, {s15, s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}188 189 @ Double precisionish operations that actually *are* allowed.190 vldr d0, [sp]191 vstr d3, [sp]192 vldm r0, {d0, d1}193 vstm r4, {d3, d4}194 vpush {d6, d7}195 vpop {d8, d9}196 vmov r1, r0, d1197 vmov d2, r3, r4198 vmov.f64 r5, r6, d7199 vmov.f64 d8, r9, r10200@ CHECK: vldr d0, [sp]201@ CHECK: vstr d3, [sp]202@ CHECK: vldmia r0, {d0, d1}203@ CHECK: vstmia r4, {d3, d4}204@ CHECK: vpush {d6, d7}205@ CHECK: vpop {d8, d9}206@ CHECK: vmov r1, r0, d1207@ CHECK: vmov d2, r3, r4208@ CHECK: vmov r5, r6, d7209@ CHECK: vmov d8, r9, r10210