206 lines · plain
1@ RUN: not llvm-mc -triple=thumbv7-unknown-linux-gnueabi -arm-implicit-it=thumb -show-encoding < %s 2>&1 | FileCheck %s2.syntax unified3 4@ Note: The error stream for XFAIL needs to get checked first.5 6ldr.w r1, [r1, #-4]!7ldr.w r1, [r0, #256]!8ldr.w r1, [r0, #-256]!9ldr.w r1, [pc, #-4]!10ldr.w r1, [r1], #411ldr.w r0, [r0], #412ldr.w r0, [r1], #25613ldr.w r0, [r1], #-25614str.w r0, [r0, #-4]!15str.w pc, [r0, #-4]!16str.w r1, [pc, #-4]!17str.w r1, [r2, #256]!18str.w r1, [r2, #-256]!19str.w r0, [r0], #420str.w pc, [r0], #421str.w r1, [r0], #25622str.w r1, [r0], #-25623 24@@ XFAIL25 26@ CHECK: error: destination register and base register can't be identical27@ CHECK-NEXT: ldr.w r1, [r1, #-4]!28@ CHECK: error: invalid instruction, any one of the following would fix this:29@ CHECK-NEXT: ldr.w r1, [r0, #256]!30@ CHECK: note: invalid operand for instruction31@ CHECK: note: too many operands for instruction32@ CHECK: error: invalid operand for instruction33@ CHECK-NEXT: ldr.w r1, [r0, #-256]!34@ CHECK: error: invalid instruction, any one of the following would fix this:35@ CHECK-NEXT: ldr.w r1, [pc, #-4]!36@ CHECK: note: invalid operand for instruction37@ CHECK: note: too many operands for instruction38@ CHECK: error: destination register and base register can't be identical39@ CHECK-NEXT: ldr.w r1, [r1], #440@ CHECK: error: destination register and base register can't be identical41@ CHECK-NEXT: ldr.w r0, [r0], #442@ CHECK: error: operand must be in range [-255, 255]43@ CHECK-NEXT: ldr.w r0, [r1], #25644@ CHECK: error: operand must be in range [-255, 255]45@ CHECK-NEXT: ldr.w r0, [r1], #-25646@ CHECK: error: destination register and base register can't be identical47@ CHECK-NEXT: str.w r0, [r0, #-4]!48@ CHECK: error: operand must be a register in range [r0, r14]49@ CHECK-NEXT: str.w pc, [r0, #-4]!50@ CHECK: error: invalid operand for instruction51@ CHECK-NEXT: str.w r1, [pc, #-4]!52@ CHECK: error: invalid instruction, any one of the following would fix this:53@ CHECK-NEXT: str.w r1, [r2, #256]!54@ CHECK: note: invalid operand for instruction55@ CHECK: note: too many operands for instruction56@ CHECK: error: invalid operand for instruction57@ CHECK-NEXT: str.w r1, [r2, #-256]!58@ CHECK: error: destination register and base register can't be identical59@ CHECK-NEXT: str.w r0, [r0], #460@ CHECK: error: operand must be a register in range [r0, r14]61@ CHECK-NEXT: str.w pc, [r0], #462@ CHECK: error: operand must be in range [-255, 255]63@ CHECK-NEXT: str.w r1, [r0], #25664@ CHECK: error: operand must be in range [-255, 255]65@ CHECK-NEXT: str.w r1, [r0], #-25666 67@@ XPASS68 69@ Simple checks that we get the same encoding w/ and w/o the .w suffix.70ldr r3, [r1], #471ldr.w r3, [r1], #472 73str r3, [r0], #474str.w r3, [r0], #475 76ldr r3, [r1, #-4]!77ldr.w r3, [r1, #-4]!78 79str r3, [r0, #-4]!80str.w r3, [r0, #-4]!81 82@ CHECK: ldr r3, [r1], #4 @ encoding: [0x51,0xf8,0x04,0x3b]83@ CHECK: ldr r3, [r1], #4 @ encoding: [0x51,0xf8,0x04,0x3b]84@ CHECK: str r3, [r0], #4 @ encoding: [0x40,0xf8,0x04,0x3b]85@ CHECK: str r3, [r0], #4 @ encoding: [0x40,0xf8,0x04,0x3b]86@ CHECK: ldr r3, [r1, #-4]! @ encoding: [0x51,0xf8,0x04,0x3d]87@ CHECK: ldr r3, [r1, #-4]! @ encoding: [0x51,0xf8,0x04,0x3d]88@ CHECK: str r3, [r0, #-4]! @ encoding: [0x40,0xf8,0x04,0x3d]89@ CHECK: str r3, [r0, #-4]! @ encoding: [0x40,0xf8,0x04,0x3d]90 91@@ LDR pre-increment w/ writeback92@ Vary Rt.93ldr.w r0, [r1, #-4]!94ldr.w sp, [r1, #-4]! @ TODO: GAS warns for this95ldr.w pc, [r1, #-4]!96@ Vary Rn.97ldr.w r1, [r0, #-4]!98ldr.w r1, [sp, #-4]!99@ Vary imm.100ldr.w r1, [r0, #255]!101ldr.w r1, [r0, #-255]!102ldr.w r1, [r0, #0]!103@ Condition codes.104ldreq.w r1, [r0, #255]!105ldrle.w r1, [r0, #255]!106 107@ CHECK: ldr r0, [r1, #-4]! @ encoding: [0x51,0xf8,0x04,0x0d]108@ CHECK: ldr sp, [r1, #-4]! @ encoding: [0x51,0xf8,0x04,0xdd]109@ CHECK: ldr pc, [r1, #-4]! @ encoding: [0x51,0xf8,0x04,0xfd]110@ CHECK: ldr r1, [r0, #-4]! @ encoding: [0x50,0xf8,0x04,0x1d]111@ CHECK: ldr r1, [sp, #-4]! @ encoding: [0x5d,0xf8,0x04,0x1d]112@ CHECK: ldr r1, [r0, #255]! @ encoding: [0x50,0xf8,0xff,0x1f]113@ CHECK: ldr r1, [r0, #-255]! @ encoding: [0x50,0xf8,0xff,0x1d]114@ CHECK: ldr r1, [r0, #0]! @ encoding: [0x50,0xf8,0x00,0x1f]115@ CHECK: it eq @ encoding: [0x08,0xbf]116@ CHECK: ldreq r1, [r0, #255]! @ encoding: [0x50,0xf8,0xff,0x1f]117@ CHECK: it le @ encoding: [0xd8,0xbf]118@ CHECK: ldrle r1, [r0, #255]! @ encoding: [0x50,0xf8,0xff,0x1f]119 120@@ LDR post-increment121@ Vary Rt.122ldr.w r0, [r1], #4123ldr.w sp, [r1], #4 @ TODO: GAS warns for this124ldr.w pc, [r1], #4125@ Vary Rn.126ldr.w r0, [r1], #4127ldr.w r0, [sp], #4128ldr.w r0, [pc], #4 @ TODO: GAS warns for this129@ Vary imm.130ldr.w r0, [r1], #255131ldr.w r0, [r1], #0132ldr.w r0, [r1], #-255133@ Condition codes.134ldreq.w r0, [r1], #255135ldrle.w r0, [r1], #255136 137@ CHECK: ldr r0, [r1], #4 @ encoding: [0x51,0xf8,0x04,0x0b]138@ CHECK: ldr sp, [r1], #4 @ encoding: [0x51,0xf8,0x04,0xdb]139@ CHECK: ldr pc, [r1], #4 @ encoding: [0x51,0xf8,0x04,0xfb]140@ CHECK: ldr r0, [r1], #4 @ encoding: [0x51,0xf8,0x04,0x0b]141@ CHECK: ldr r0, [sp], #4 @ encoding: [0x5d,0xf8,0x04,0x0b]142@ CHECK: ldr r0, [pc], #4 @ encoding: [0x5f,0xf8,0x04,0x0b]143@ CHECK: ldr r0, [r1], #255 @ encoding: [0x51,0xf8,0xff,0x0b]144@ CHECK: ldr r0, [r1], #0 @ encoding: [0x51,0xf8,0x00,0x0b]145@ CHECK: ldr r0, [r1], #-255 @ encoding: [0x51,0xf8,0xff,0x09]146@ CHECK: it eq @ encoding: [0x08,0xbf]147@ CHECK: ldreq r0, [r1], #255 @ encoding: [0x51,0xf8,0xff,0x0b]148@ CHECK: it le @ encoding: [0xd8,0xbf]149@ CHECK: ldrle r0, [r1], #255 @ encoding: [0x51,0xf8,0xff,0x0b]150 151@@ STR pre-increment w/ writeback152@ Vary Rt.153str.w r1, [r0, #-4]!154str.w sp, [r0, #-4]!155@ Vary Rn.156str.w r1, [r2, #-4]!157str.w r1, [sp, #-4]!158@ Vary imm.159str.w r1, [r2, #255]!160str.w r1, [r2, #0]!161str.w r1, [r2, #-255]!162@ Condition codes.163streq.w r1, [r2, #255]!164strle.w r1, [r2, #255]!165 166@ CHECK: str r1, [r0, #-4]! @ encoding: [0x40,0xf8,0x04,0x1d]167@ CHECK: str sp, [r0, #-4]! @ encoding: [0x40,0xf8,0x04,0xdd]168@ CHECK: str r1, [r2, #-4]! @ encoding: [0x42,0xf8,0x04,0x1d]169@ CHECK: str r1, [sp, #-4]! @ encoding: [0x4d,0xf8,0x04,0x1d]170@ CHECK: str r1, [r2, #255]! @ encoding: [0x42,0xf8,0xff,0x1f]171@ CHECK: str r1, [r2, #0]! @ encoding: [0x42,0xf8,0x00,0x1f]172@ CHECK: str r1, [r2, #-255]! @ encoding: [0x42,0xf8,0xff,0x1d]173@ CHECK: it eq @ encoding: [0x08,0xbf]174@ CHECK: streq r1, [r2, #255]! @ encoding: [0x42,0xf8,0xff,0x1f]175@ CHECK: it le @ encoding: [0xd8,0xbf]176@ CHECK: strle r1, [r2, #255]! @ encoding: [0x42,0xf8,0xff,0x1f]177 178@@ STR post-increment179@ Vary Rt.180str.w r1, [r0], #4181str.w sp, [r0], #4182@ Vary Rn.183str.w r0, [r1], #4184str.w r0, [sp], #4185str.w r0, [pc], #4 @ TODO: GAS warns for this.186@ Vary imm.187str.w r1, [r0], #255188str.w r1, [r0], #0189str.w r1, [r0], #-255190@ Condition codes.191streq.w r1, [r0], #255192strle.w r1, [r0], #255193 194@ CHECK: str r1, [r0], #4 @ encoding: [0x40,0xf8,0x04,0x1b]195@ CHECK: str sp, [r0], #4 @ encoding: [0x40,0xf8,0x04,0xdb]196@ CHECK: str r0, [r1], #4 @ encoding: [0x41,0xf8,0x04,0x0b]197@ CHECK: str r0, [sp], #4 @ encoding: [0x4d,0xf8,0x04,0x0b]198@ CHECK: str r0, [pc], #4 @ encoding: [0x4f,0xf8,0x04,0x0b]199@ CHECK: str r1, [r0], #255 @ encoding: [0x40,0xf8,0xff,0x1b]200@ CHECK: str r1, [r0], #0 @ encoding: [0x40,0xf8,0x00,0x1b]201@ CHECK: str r1, [r0], #-255 @ encoding: [0x40,0xf8,0xff,0x19]202@ CHECK: it eq @ encoding: [0x08,0xbf]203@ CHECK: streq r1, [r0], #255 @ encoding: [0x40,0xf8,0xff,0x1b]204@ CHECK: it le @ encoding: [0xd8,0xbf]205@ CHECK: strle r1, [r0], #255 @ encoding: [0x40,0xf8,0xff,0x1b]206