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1@ RUN: llvm-mc -triple=thumbv7m-apple-darwin -show-encoding < %s | FileCheck %s2@ RUN: not llvm-mc -triple=thumbv6 -show-encoding 2>&1 < %s | FileCheck %s --check-prefix=CHECK-V6M3 .syntax unified4 .globl _func5 6@ Check that the assembler can handle the documented syntax from the ARM ARM.7@ These tests test instruction encodings specific to ARMv7m.8 9@------------------------------------------------------------------------------10@ MRS11@------------------------------------------------------------------------------12 13 mrs r0, basepri14 mrs r0, basepri_max15 mrs r0, faultmask16 17@ CHECK: mrs r0, basepri @ encoding: [0xef,0xf3,0x11,0x80]18@ CHECK: mrs r0, basepri_max @ encoding: [0xef,0xf3,0x12,0x80]19@ CHECK: mrs r0, faultmask @ encoding: [0xef,0xf3,0x13,0x80]20 21@------------------------------------------------------------------------------22@ MSR23@------------------------------------------------------------------------------24 25 msr basepri, r026 msr basepri_max, r027 msr faultmask, r028 29@ CHECK: msr basepri, r0 @ encoding: [0x80,0xf3,0x11,0x88]30@ CHECK: msr basepri_max, r0 @ encoding: [0x80,0xf3,0x12,0x88]31@ CHECK: msr faultmask, r0 @ encoding: [0x80,0xf3,0x13,0x88]32 33@ CHECK-V6M: error: invalid instruction34@ CHECK-V6M-NEXT: mrs r0, basepri35@ CHECK-V6M: error: invalid instruction36@ CHECK-V6M-NEXT: mrs r0, basepri_max37@ CHECK-V6M: error: invalid instruction38@ CHECK-V6M-NEXT: mrs r0, faultmask39@ CHECK-V6M: error: invalid instruction40@ CHECK-V6M-NEXT: msr basepri, r041@ CHECK-V6M: error: invalid instruction42@ CHECK-V6M-NEXT: msr basepri_max, r043@ CHECK-V6M: error: invalid instruction44@ CHECK-V6M-NEXT: msr faultmask, r045 46