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1# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX1032 %s2# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize64 -disassemble -show-encoding < %s | FileCheck -check-prefix=GFX1064 %s3 4# GFX1032: v_cmp_lt_f32_e32 vcc_lo, s2, v45# GFX1064: v_cmp_lt_f32_e32 vcc, s2, v460x02,0x08,0x02,0x7c7 8# GFX1032: v_cmp_ge_i32_e64 s2, s0, v29# GFX1064: v_cmp_ge_i32_e64 s[2:3], s0, v2100x02,0x00,0x86,0xd4,0x00,0x04,0x02,0x0011 12# GFX1032: v_cmp_ge_i32_sdwa vcc_lo, v0, v2 src0_sel:WORD_1 src1_sel:DWORD13# GFX1064: v_cmp_ge_i32_sdwa vcc, v0, v2 src0_sel:WORD_1 src1_sel:DWORD140xf9,0x04,0x0c,0x7d,0x00,0x00,0x05,0x0615 16# GFX1032: v_cmp_le_f16_sdwa s0, v3, v4 src0_sel:WORD_1 src1_sel:DWORD17# GFX1064: v_cmp_le_f16_sdwa s[0:1], v3, v4 src0_sel:WORD_1 src1_sel:DWORD180xf9,0x08,0x96,0x7d,0x03,0x80,0x05,0x0619 20# GFX1032: v_cmp_class_f32_e32 vcc_lo, s0, v021# GFX1064: v_cmp_class_f32_e32 vcc, s0, v0220x00,0x00,0x10,0x7d23 24# GFX1032: v_cmp_class_f16_sdwa vcc_lo, v1, v2 src0_sel:DWORD src1_sel:DWORD25# GFX1064: v_cmp_class_f16_sdwa vcc, v1, v2 src0_sel:DWORD src1_sel:DWORD260xf9,0x04,0x1e,0x7d,0x01,0x00,0x06,0x0627 28# GFX1032: v_cmp_class_f16_sdwa s0, v1, v2 src0_sel:DWORD src1_sel:DWORD29# GFX1064: v_cmp_class_f16_sdwa s[0:1], v1, v2 src0_sel:DWORD src1_sel:DWORD300xf9,0x04,0x1e,0x7d,0x01,0x80,0x06,0x0631 32# GFX1032: v_cndmask_b32_e32 v5, 0, v2, vcc_lo33# GFX1064: v_cndmask_b32_e32 v5, 0, v2, vcc ;340x80,0x04,0x0a,0x0235 36# GFX1032: v_cndmask_b32_e32 v1, v2, v3, vcc_lo37# GFX1064: v_cndmask_b32_e32 v1, v2, v3, vcc ;380x02,0x07,0x02,0x0239 40# GFX1032: v_cndmask_b32_sdwa v5, v1, v2, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD41# GFX1064: v_cndmask_b32_sdwa v5, v1, v2, vcc dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD src1_sel:DWORD420xf9,0x04,0x0a,0x02,0x01,0x16,0x06,0x0643 44# GFX1032: v_cndmask_b32_dpp v5, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x045# GFX1064: v_cndmask_b32_dpp v5, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0460xfa,0x04,0x0a,0x02,0x01,0xe4,0x00,0x0047 48# GFX1032: v_add_co_u32 v2, vcc_lo, s0, v249# GFX1064: v_add_co_u32 v2, vcc, s0, v2500x02,0x6a,0x0f,0xd7,0x00,0x04,0x02,0x0051 52# GFX1032: v_add_co_ci_u32_e32 v3, vcc_lo, v3, v4, vcc_lo53# GFX1064: v_add_co_ci_u32_e32 v3, vcc, v3, v4, vcc ;540x03,0x09,0x06,0x5055 56# GFX1032: v_sub_co_u32 v2, vcc_lo, s0, v257# GFX1064: v_sub_co_u32 v2, vcc, s0, v2580x02,0x6a,0x10,0xd7,0x00,0x04,0x02,0x0059 60# GFX1032: v_subrev_co_u32 v2, vcc_lo, s0, v261# GFX1064: v_subrev_co_u32 v2, vcc, s0, v2620x02,0x6a,0x19,0xd7,0x00,0x04,0x02,0x0063 64# GFX1032: v_sub_co_ci_u32_e32 v3, vcc_lo, v3, v4, vcc_lo65# GFX1064: v_sub_co_ci_u32_e32 v3, vcc, v3, v4, vcc ;660x03,0x09,0x06,0x5267 68# GFX1032: v_subrev_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo69# GFX1064: v_subrev_co_ci_u32_e32 v1, vcc, 0, v1, vcc ;700x80,0x02,0x02,0x5471 72# GFX1032: v_add_co_ci_u32_sdwa v1, vcc_lo, v1, v4, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD73# GFX1064: v_add_co_ci_u32_sdwa v1, vcc, v1, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD740xf9,0x08,0x02,0x50,0x01,0x06,0x00,0x0675 76# GFX1032: v_sub_co_ci_u32_sdwa v1, vcc_lo, v1, v4, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD77# GFX1064: v_sub_co_ci_u32_sdwa v1, vcc, v1, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD780xf9,0x08,0x02,0x52,0x01,0x06,0x00,0x0679 80# GFX1032: v_subrev_co_ci_u32_sdwa v1, vcc_lo, v1, v4, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD81# GFX1064: v_subrev_co_ci_u32_sdwa v1, vcc, v1, v4, vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD820xf9,0x08,0x02,0x54,0x01,0x06,0x00,0x0683 84# GFX1032: v_add_co_ci_u32_sdwa v1, vcc_lo, sext(v1), sext(v4), vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD85# GFX1064: v_add_co_ci_u32_sdwa v1, vcc, sext(v1), sext(v4), vcc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD860xf9,0x08,0x02,0x50,0x01,0x06,0x08,0x0e87 88# GFX1032: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x089# GFX1064: v_add_nc_u32_dpp v5, v1, v2 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0900xfa,0x04,0x0a,0x4a,0x01,0xe4,0x00,0x0091 92# FIXME: Results in invalid v_subrev_u16_dpp which apparently has the same encoding but does not exist in GFX1093 94# COM: GFX1032: v_add_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x095# COM: GFX1064: v_add_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x096# 0xfa,0x04,0x0a,0x50,0x01,0xe4,0x00,0x0097 98# FIXME: Results in v_mul_lo_u16_dpp99 100# COM: GFX1032: v_sub_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0101# COM: GFX1064: v_sub_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0102# 0xfa,0x04,0x0a,0x52,0x01,0xe4,0x00,0x00103 104# FIXME: gives v_lshlrev_b16_dpp105 106# COM: GFX1032: v_subrev_co_ci_u32_dpp v5, vcc_lo, v1, v2, vcc_lo quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0107# COM: GFX1064: v_subrev_co_ci_u32_dpp v5, vcc, v1, v2, vcc quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0108# 0xfa,0x04,0x0a,0x54,0x01,0xe4,0x00,0x00109 110# GFX1032: v_add_co_u32 v0, s0, v0, v2111# GFX1064: v_add_co_u32 v0, s[0:1], v0, v21120x00,0x00,0x0f,0xd7,0x00,0x05,0x02,0x00113 114# GFX1032: v_add_co_ci_u32_e64 v4, s0, v1, v5, s2115# GFX1064: v_add_co_ci_u32_e64 v4, s[0:1], v1, v5, s[2:3]1160x04,0x00,0x28,0xd5,0x01,0x0b,0x0a,0x00117 118# GFX1032: v_sub_co_u32 v0, s0, v0, v2119# GFX1064: v_sub_co_u32 v0, s[0:1], v0, v21200x00,0x00,0x10,0xd7,0x00,0x05,0x02,0x00121 122# GFX1032: v_sub_co_ci_u32_e64 v4, s0, v1, v5, s2123# GFX1064: v_sub_co_ci_u32_e64 v4, s[0:1], v1, v5, s[2:3]1240x04,0x00,0x29,0xd5,0x01,0x0b,0x0a,0x00125 126# GFX1032: v_subrev_co_u32 v0, s0, v0, v2127# GFX1064: v_subrev_co_u32 v0, s[0:1], v0, v21280x00,0x00,0x19,0xd7,0x00,0x05,0x02,0x00129 130# GFX1032: v_subrev_co_ci_u32_e64 v4, s0, v1, v5, s2131# GFX1064: v_subrev_co_ci_u32_e64 v4, s[0:1], v1, v5, s[2:3]1320x04,0x00,0x2a,0xd5,0x01,0x0b,0x0a,0x00133 134# GFX1032: v_add_co_ci_u32_e64 v4, vcc_lo, v1, v5, s2135# GFX1064: v_add_co_ci_u32_e64 v4, vcc, v1, v5, s[2:3]1360x04,0x6a,0x28,0xd5,0x01,0x0b,0x0a,0x00137 138# GFX1032: v_add_co_ci_u32_e64 v4, s0, v1, v5, vcc_lo139# GFX1064: v_add_co_ci_u32_e64 v4, s[0:1], v1, v5, vcc ;1400x04,0x00,0x28,0xd5,0x01,0x0b,0xaa,0x01141 142# GFX1032: v_div_scale_f32 v2, s2, v0, v0, v2143# GFX1064: v_div_scale_f32 v2, s[2:3], v0, v0, v21440x02,0x02,0x6d,0xd5,0x00,0x01,0x0a,0x04145 146# GFX1032: v_div_scale_f64 v[2:3], s2, v[0:1], v[0:1], v[2:3]147# GFX1064: v_div_scale_f64 v[2:3], s[2:3], v[0:1], v[0:1], v[2:3]1480x02,0x02,0x6e,0xd5,0x00,0x01,0x0a,0x04149 150# GFX1032: v_mad_i64_i32 v[0:1], s6, v0, v1, v[2:3]151# GFX1064: v_mad_i64_i32 v[0:1], s[6:7], v0, v1, v[2:3]1520x00,0x06,0x77,0xd5,0x00,0x03,0x0a,0x04153 154# GFX1032: v_mad_u64_u32 v[0:1], s6, v0, v1, v[2:3]155# GFX1064: v_mad_u64_u32 v[0:1], s[6:7], v0, v1, v[2:3]1560x00,0x06,0x76,0xd5,0x00,0x03,0x0a,0x04157 158# GFX1032: v_cmpx_neq_f32_e32 v0, v1159# GFX1064: v_cmpx_neq_f32_e32 v0, v11600x00,0x03,0x3a,0x7c161 162# GFX1032: v_cmpx_neq_f32_sdwa v0, v1 src0_sel:WORD_1 src1_sel:DWORD163# GFX1064: v_cmpx_neq_f32_sdwa v0, v1 src0_sel:WORD_1 src1_sel:DWORD1640xf9,0x02,0x3a,0x7c,0x00,0x00,0x05,0x06165 166# GFX1032: v_cmpx_class_f32_e64 v0, 1167# GFX1064: v_cmpx_class_f32_e64 v0, 11680x00,0x00,0x98,0xd4,0x00,0x03,0x01,0x00169 170# GFX1032: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD171# GFX1064: v_cmpx_class_f32_sdwa v0, 1 src0_sel:WORD_1 src1_sel:DWORD1720xf9,0x02,0x31,0x7d,0x00,0x00,0x05,0x86173