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1# RUN: llvm-mc -triple=amdgcn -mcpu=gfx1010 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX10102 3#===------------------------------------------------------------------------===#4# Image atomics5#===------------------------------------------------------------------------===#6 7# GFX1010: image_atomic_add v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe80x00,0x01,0x45,0xf0,0x01,0x05,0x02,0x009 10# GFX1010: image_atomic_add v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe110x00,0x03,0x45,0xf0,0x01,0x05,0x02,0x0012 13# GFX1010: image_atomic_and v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe140x00,0x01,0x61,0xf0,0x01,0x05,0x02,0x0015 16# GFX1010: image_atomic_and v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe170x00,0x03,0x61,0xf0,0x01,0x05,0x02,0x0018 19# GFX1010: image_atomic_cmpswap v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe200x00,0x03,0x41,0xf0,0x01,0x05,0x02,0x0021 22# GFX1010: image_atomic_cmpswap v[5:9], v1, s[8:15] dmask:0xf dim:SQ_RSRC_IMG_1D tfe230x00,0x0f,0x41,0xf0,0x01,0x05,0x02,0x0024 25# GFX1010: image_atomic_dec v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe260x00,0x01,0x71,0xf0,0x01,0x05,0x02,0x0027 28# GFX1010: image_atomic_dec v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe290x00,0x03,0x71,0xf0,0x01,0x05,0x02,0x0030 31# GFX1010: image_atomic_inc v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe320x00,0x01,0x6d,0xf0,0x01,0x05,0x02,0x0033 34# GFX1010: image_atomic_inc v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe350x00,0x03,0x6d,0xf0,0x01,0x05,0x02,0x0036 37# GFX1010: image_atomic_or v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe380x00,0x01,0x65,0xf0,0x01,0x05,0x02,0x0039 40# GFX1010: image_atomic_or v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe410x00,0x03,0x65,0xf0,0x01,0x05,0x02,0x0042 43# GFX1010: image_atomic_smax v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe440x00,0x01,0x59,0xf0,0x01,0x05,0x02,0x0045 46# GFX1010: image_atomic_smax v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe470x00,0x03,0x59,0xf0,0x01,0x05,0x02,0x0048 49# GFX1010: image_atomic_smin v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe500x00,0x01,0x51,0xf0,0x01,0x05,0x02,0x0051 52# GFX1010: image_atomic_smin v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe530x00,0x03,0x51,0xf0,0x01,0x05,0x02,0x0054 55# GFX1010: image_atomic_sub v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe560x00,0x01,0x49,0xf0,0x01,0x05,0x02,0x0057 58# GFX1010: image_atomic_sub v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe590x00,0x03,0x49,0xf0,0x01,0x05,0x02,0x0060 61# GFX1010: image_atomic_swap v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe620x00,0x01,0x3d,0xf0,0x01,0x05,0x02,0x0063 64# GFX1010: image_atomic_swap v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe650x00,0x03,0x3d,0xf0,0x01,0x05,0x02,0x0066 67# GFX1010: image_atomic_umax v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe680x00,0x01,0x5d,0xf0,0x01,0x05,0x02,0x0069 70# GFX1010: image_atomic_umax v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe710x00,0x03,0x5d,0xf0,0x01,0x05,0x02,0x0072 73# GFX1010: image_atomic_umin v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe740x00,0x01,0x55,0xf0,0x01,0x05,0x02,0x0075 76# GFX1010: image_atomic_umin v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe770x00,0x03,0x55,0xf0,0x01,0x05,0x02,0x0078 79# GFX1010: image_atomic_xor v[5:6], v1, s[8:15] dmask:0x1 dim:SQ_RSRC_IMG_1D tfe800x00,0x01,0x69,0xf0,0x01,0x05,0x02,0x0081 82# GFX1010: image_atomic_xor v[5:7], v1, s[8:15] dmask:0x3 dim:SQ_RSRC_IMG_1D tfe830x00,0x03,0x69,0xf0,0x01,0x05,0x02,0x0084 85