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1# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s -check-prefix=GFX9002 3#===------------------------------------------------------------------------===#4# Image atomics5#===------------------------------------------------------------------------===#6# GFX900: image_atomic_add v[5:6], v1, s[8:15] dmask:0x1 tfe70x00,0x01,0x49,0xf0,0x01,0x05,0x02,0x008 9# GFX900: image_atomic_add v[5:7], v1, s[8:15] dmask:0x3 tfe100x00,0x03,0x49,0xf0,0x01,0x05,0x02,0x0011 12# GFX900: image_atomic_and v[5:6], v1, s[8:15] dmask:0x1 tfe130x00,0x01,0x61,0xf0,0x01,0x05,0x02,0x0014 15# GFX900: image_atomic_and v[5:7], v1, s[8:15] dmask:0x3 tfe160x00,0x03,0x61,0xf0,0x01,0x05,0x02,0x0017 18# GFX900: image_atomic_cmpswap v[5:7], v1, s[8:15] dmask:0x3 tfe190x00,0x03,0x45,0xf0,0x01,0x05,0x02,0x0020 21# GFX900: image_atomic_cmpswap v[5:9], v1, s[8:15] dmask:0xf tfe220x00,0x0f,0x45,0xf0,0x01,0x05,0x02,0x0023 24# GFX900: image_atomic_dec v[5:6], v1, s[8:15] dmask:0x1 tfe250x00,0x01,0x71,0xf0,0x01,0x05,0x02,0x0026 27# GFX900: image_atomic_dec v[5:7], v1, s[8:15] dmask:0x3 tfe280x00,0x03,0x71,0xf0,0x01,0x05,0x02,0x0029 30# GFX900: image_atomic_inc v[5:6], v1, s[8:15] dmask:0x1 tfe310x00,0x01,0x6d,0xf0,0x01,0x05,0x02,0x0032 33# GFX900: image_atomic_inc v[5:7], v1, s[8:15] dmask:0x3 tfe340x00,0x03,0x6d,0xf0,0x01,0x05,0x02,0x0035 36# GFX900: image_atomic_or v[5:6], v1, s[8:15] dmask:0x1 tfe370x00,0x01,0x65,0xf0,0x01,0x05,0x02,0x0038 39# GFX900: image_atomic_or v[5:7], v1, s[8:15] dmask:0x3 tfe400x00,0x03,0x65,0xf0,0x01,0x05,0x02,0x0041 42# GFX900: image_atomic_smax v[5:6], v1, s[8:15] dmask:0x1 tfe430x00,0x01,0x59,0xf0,0x01,0x05,0x02,0x0044 45# GFX900: image_atomic_smax v[5:7], v1, s[8:15] dmask:0x3 tfe460x00,0x03,0x59,0xf0,0x01,0x05,0x02,0x0047 48# GFX900: image_atomic_smin v[5:6], v1, s[8:15] dmask:0x1 tfe490x00,0x01,0x51,0xf0,0x01,0x05,0x02,0x0050 51# GFX900: image_atomic_smin v[5:7], v1, s[8:15] dmask:0x3 tfe520x00,0x03,0x51,0xf0,0x01,0x05,0x02,0x0053 54# GFX900: image_atomic_sub v[5:6], v1, s[8:15] dmask:0x1 tfe550x00,0x01,0x4d,0xf0,0x01,0x05,0x02,0x0056 57# GFX900: image_atomic_sub v[5:7], v1, s[8:15] dmask:0x3 tfe580x00,0x03,0x4d,0xf0,0x01,0x05,0x02,0x0059 60# GFX900: image_atomic_swap v[5:6], v1, s[8:15] dmask:0x1 tfe610x00,0x01,0x41,0xf0,0x01,0x05,0x02,0x0062 63# GFX900: image_atomic_swap v[5:7], v1, s[8:15] dmask:0x3 tfe640x00,0x03,0x41,0xf0,0x01,0x05,0x02,0x0065 66# GFX900: image_atomic_umax v[5:6], v1, s[8:15] dmask:0x1 tfe670x00,0x01,0x5d,0xf0,0x01,0x05,0x02,0x0068 69# GFX900: image_atomic_umax v[5:7], v1, s[8:15] dmask:0x3 tfe700x00,0x03,0x5d,0xf0,0x01,0x05,0x02,0x0071 72# GFX900: image_atomic_umin v[5:6], v1, s[8:15] dmask:0x1 tfe730x00,0x01,0x55,0xf0,0x01,0x05,0x02,0x0074 75# GFX900: image_atomic_umin v[5:7], v1, s[8:15] dmask:0x3 tfe760x00,0x03,0x55,0xf0,0x01,0x05,0x02,0x0077 78# GFX900: image_atomic_xor v[5:6], v1, s[8:15] dmask:0x1 tfe790x00,0x01,0x69,0xf0,0x01,0x05,0x02,0x0080 81# GFX900: image_atomic_xor v[5:7], v1, s[8:15] dmask:0x3 tfe820x00,0x03,0x69,0xf0,0x01,0x05,0x02,0x0083 84