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1# RUN: llvm-mc -triple=amdgcn -mcpu=gfx900 -disassemble -show-encoding < %s | FileCheck %s2 3# Check that we can disassemble opcodes w/o src2 with any op_sel_hi value for src24 5# CHECK: v_pk_add_f16 v5, v1, v2 ; encoding: [0x05,0x40,0x8f,0xd3,0x01,0x05,0x02,0x18]60x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x187 8# CHECK: v_pk_add_f16 v5, v1, v2 ; encoding: [0x05,0x40,0x8f,0xd3,0x01,0x05,0x02,0x18]90x05,0x40,0x8f,0xd3,0x01,0x05,0x02,0x1810 11# CHECK: v_pk_add_f16 v5, v1, v2 op_sel_hi:[0,0] ; encoding: [0x05,0x40,0x8f,0xd3,0x01,0x05,0x02,0x00]120x05,0x00,0x8f,0xd3,0x01,0x05,0x02,0x0013 14# CHECK: v_pk_add_f16 v5, v1, v2 op_sel_hi:[0,0] ; encoding: [0x05,0x40,0x8f,0xd3,0x01,0x05,0x02,0x00]150x05,0x40,0x8f,0xd3,0x01,0x05,0x02,0x0016