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1# RUN: not llvm-mc -disassemble -triple armv8a-none-eabi -mattr=+fullfp16,+neon -show-encoding < %s 2>%t | FileCheck %s2# RUN FileCheck %s < %t --check-prefix=STDERR3 4# CHECK: vadd.f16 d0, d1, d25# CHECK: vadd.f16 q0, q1, q26[0x02,0x0d,0x11,0xf2]7[0x44,0x0d,0x12,0xf2]8 9# CHECK: vsub.f16 d0, d1, d210# CHECK: vsub.f16 q0, q1, q211[0x02,0x0d,0x31,0xf2]12[0x44,0x0d,0x32,0xf2]13 14# CHECK: vmul.f16 d0, d1, d215# CHECK: vmul.f16 q0, q1, q216[0x12,0x0d,0x11,0xf3]17[0x54,0x0d,0x12,0xf3]18 19# CHECK: vmul.f16 d1, d2, d3[2]20# CHECK: vmul.f16 q4, q5, d6[3]21[0x63,0x19,0x92,0xf2]22[0x6e,0x89,0x9a,0xf3]23 24# CHECK: vmla.f16 d0, d1, d225# CHECK: vmla.f16 q0, q1, q226[0x12,0x0d,0x11,0xf2]27[0x54,0x0d,0x12,0xf2]28 29# CHECK: vmla.f16 d5, d6, d7[2]30# CHECK: vmla.f16 q5, q6, d7[3]31[0x67,0x51,0x96,0xf2]32[0x6f,0xa1,0x9c,0xf3]33 34# CHECK: vmls.f16 d0, d1, d235# CHECK: vmls.f16 q0, q1, q236[0x12,0x0d,0x31,0xf2]37[0x54,0x0d,0x32,0xf2]38 39# CHECK: vmls.f16 d5, d6, d7[2]40# CHECK: vmls.f16 q5, q6, d7[3]41[0x67,0x55,0x96,0xf2]42[0x6f,0xa5,0x9c,0xf3]43 44# CHECK: vfma.f16 d0, d1, d245# CHECK: vfma.f16 q0, q1, q246[0x12,0x0c,0x11,0xf2]47[0x54,0x0c,0x12,0xf2]48 49# CHECK: vfms.f16 d0, d1, d250# CHECK: vfms.f16 q0, q1, q251[0x12,0x0c,0x31,0xf2]52[0x54,0x0c,0x32,0xf2]53 54# CHECK: vceq.f16 d2, d3, d455# CHECK: vceq.f16 q2, q3, q456[0x04,0x2e,0x13,0xf2]57[0x48,0x4e,0x16,0xf2]58 59# CHECK: vceq.f16 d2, d3, #060# CHECK: vceq.f16 q2, q3, #061[0x03,0x25,0xb5,0xf3]62[0x46,0x45,0xb5,0xf3]63 64# CHECK: vcge.f16 d2, d3, d465# CHECK: vcge.f16 q2, q3, q466[0x04,0x2e,0x13,0xf3]67[0x48,0x4e,0x16,0xf3]68 69# CHECK: vcge.f16 d2, d3, #070# CHECK: vcge.f16 q2, q3, #071[0x83,0x24,0xb5,0xf3]72[0xc6,0x44,0xb5,0xf3]73 74# CHECK: vcgt.f16 d2, d3, d475# CHECK: vcgt.f16 q2, q3, q476[0x04,0x2e,0x33,0xf3]77[0x48,0x4e,0x36,0xf3]78 79# CHECK: vcgt.f16 d2, d3, #080# CHECK: vcgt.f16 q2, q3, #081[0x03,0x24,0xb5,0xf3]82[0x46,0x44,0xb5,0xf3]83 84# CHECK: vcle.f16 d2, d3, #085# CHECK: vcle.f16 q2, q3, #086[0x83,0x25,0xb5,0xf3]87[0xc6,0x45,0xb5,0xf3]88 89# CHECK: vclt.f16 d2, d3, #090# CHECK: vclt.f16 q2, q3, #091[0x03,0x26,0xb5,0xf3]92[0x46,0x46,0xb5,0xf3]93 94# CHECK: vacge.f16 d0, d1, d295# CHECK: vacge.f16 q0, q1, q296[0x12,0x0e,0x11,0xf3]97[0x54,0x0e,0x12,0xf3]98 99# CHECK: vacgt.f16 d0, d1, d2100# CHECK: vacgt.f16 q0, q1, q2101[0x12,0x0e,0x31,0xf3]102[0x54,0x0e,0x32,0xf3]103 104# CHECK: vabd.f16 d0, d1, d2105# CHECK: vabd.f16 q0, q1, q2106[0x02,0x0d,0x31,0xf3]107[0x44,0x0d,0x32,0xf3]108 109# CHECK: vabs.f16 d0, d1110# CHECK: vabs.f16 q0, q1111[0x01,0x07,0xb5,0xf3]112[0x42,0x07,0xb5,0xf3]113 114# CHECK: vmax.f16 d0, d1, d2115# CHECK: vmax.f16 q0, q1, q2116[0x02,0x0f,0x11,0xf2]117[0x44,0x0f,0x12,0xf2]118 119# CHECK: vmin.f16 d0, d1, d2120# CHECK: vmin.f16 q0, q1, q2121[0x02,0x0f,0x31,0xf2]122[0x44,0x0f,0x32,0xf2]123 124# CHECK: vmaxnm.f16 d0, d1, d2125# CHECK: vmaxnm.f16 q0, q1, q2126[0x12,0x0f,0x11,0xf3]127[0x54,0x0f,0x12,0xf3]128 129# CHECK: vminnm.f16 d0, d1, d2130# CHECK: vminnm.f16 q0, q1, q2131[0x12,0x0f,0x31,0xf3]132[0x54,0x0f,0x32,0xf3]133 134# CHECK: vpadd.f16 d0, d1, d2135[0x02,0x0d,0x11,0xf3]136 137# CHECK: vpmax.f16 d0, d1, d2138[0x02,0x0f,0x11,0xf3]139 140# CHECK: vpmin.f16 d0, d1, d2141[0x02,0x0f,0x31,0xf3]142 143# CHECK: vrecpe.f16 d0, d1144# CHECK: vrecpe.f16 q0, q1145[0x01,0x05,0xb7,0xf3]146[0x42,0x05,0xb7,0xf3]147 148# CHECK: vrecps.f16 d0, d1, d2149# CHECK: vrecps.f16 q0, q1, q2150[0x12,0x0f,0x11,0xf2]151[0x54,0x0f,0x12,0xf2]152 153# CHECK: vrsqrte.f16 d0, d1154# CHECK: vrsqrte.f16 q0, q1155[0x81,0x05,0xb7,0xf3]156[0xc2,0x05,0xb7,0xf3]157 158# CHECK: vrsqrts.f16 d0, d1, d2159# CHECK: vrsqrts.f16 q0, q1, q2160[0x12,0x0f,0x31,0xf2]161[0x54,0x0f,0x32,0xf2]162 163# CHECK: vneg.f16 d0, d1164# CHECK: vneg.f16 q0, q1165[0x81,0x07,0xb5,0xf3]166[0xc2,0x07,0xb5,0xf3]167 168# CHECK: vcvt.s16.f16 d0, d1169# CHECK: vcvt.u16.f16 d0, d1170# CHECK: vcvt.f16.s16 d0, d1171# CHECK: vcvt.f16.u16 d0, d1172# CHECK: vcvt.s16.f16 q0, q1173# CHECK: vcvt.u16.f16 q0, q1174# CHECK: vcvt.f16.s16 q0, q1175# CHECK: vcvt.f16.u16 q0, q1176[0x01,0x07,0xb7,0xf3]177[0x81,0x07,0xb7,0xf3]178[0x01,0x06,0xb7,0xf3]179[0x81,0x06,0xb7,0xf3]180[0x42,0x07,0xb7,0xf3]181[0xc2,0x07,0xb7,0xf3]182[0x42,0x06,0xb7,0xf3]183[0xc2,0x06,0xb7,0xf3]184 185# CHECK: vcvta.s16.f16 d0, d1186# CHECK: vcvta.s16.f16 q0, q1187# CHECK: vcvta.u16.f16 d0, d1188# CHECK: vcvta.u16.f16 q0, q1189[0x01,0x00,0xb7,0xf3]190[0x42,0x00,0xb7,0xf3]191[0x81,0x00,0xb7,0xf3]192[0xc2,0x00,0xb7,0xf3]193 194# CHECK: vcvtm.s16.f16 d0, d1195# CHECK: vcvtm.s16.f16 q0, q1196# CHECK: vcvtm.u16.f16 d0, d1197# CHECK: vcvtm.u16.f16 q0, q1198[0x01,0x03,0xb7,0xf3]199[0x42,0x03,0xb7,0xf3]200[0x81,0x03,0xb7,0xf3]201[0xc2,0x03,0xb7,0xf3]202 203# CHECK: vcvtn.s16.f16 d0, d1204# CHECK: vcvtn.s16.f16 q0, q1205# CHECK: vcvtn.u16.f16 d0, d1206# CHECK: vcvtn.u16.f16 q0, q1207[0x01,0x01,0xb7,0xf3]208[0x42,0x01,0xb7,0xf3]209[0x81,0x01,0xb7,0xf3]210[0xc2,0x01,0xb7,0xf3]211 212# CHECK: vcvtp.s16.f16 d0, d1213# CHECK: vcvtp.s16.f16 q0, q1214# CHECK: vcvtp.u16.f16 d0, d1215# CHECK: vcvtp.u16.f16 q0, q1216[0x01,0x02,0xb7,0xf3]217[0x42,0x02,0xb7,0xf3]218[0x81,0x02,0xb7,0xf3]219[0xc2,0x02,0xb7,0xf3]220 221# CHECK: vcvt.s16.f16 d0, d1, #1222# CHECK: vcvt.u16.f16 d0, d1, #2223# CHECK: vcvt.f16.s16 d0, d1, #3224# CHECK: vcvt.f16.u16 d0, d1, #4225# CHECK: vcvt.s16.f16 q0, q1, #5226# CHECK: vcvt.u16.f16 q0, q1, #6227# CHECK: vcvt.f16.s16 q0, q1, #7228# CHECK: vcvt.f16.u16 q0, q1, #8229[0x11,0x0d,0xbf,0xf2]230[0x11,0x0d,0xbe,0xf3]231[0x11,0x0c,0xbd,0xf2]232[0x11,0x0c,0xbc,0xf3]233[0x52,0x0d,0xbb,0xf2]234[0x52,0x0d,0xba,0xf3]235[0x52,0x0c,0xb9,0xf2]236[0x52,0x0c,0xb8,0xf3]237 238# CHECK: vrinta.f16 d0, d1239# CHECK: vrinta.f16 q0, q1240[0x01,0x05,0xb6,0xf3]241[0x42,0x05,0xb6,0xf3]242 243# CHECK: vrintm.f16 d0, d1244# CHECK: vrintm.f16 q0, q1245[0x81,0x06,0xb6,0xf3]246[0xc2,0x06,0xb6,0xf3]247 248# CHECK: vrintn.f16 d0, d1249# CHECK: vrintn.f16 q0, q1250[0x01,0x04,0xb6,0xf3]251[0x42,0x04,0xb6,0xf3]252 253# CHECK: vrintp.f16 d0, d1254# CHECK: vrintp.f16 q0, q1255[0x81,0x07,0xb6,0xf3]256[0xc2,0x07,0xb6,0xf3]257 258# CHECK: vrintx.f16 d0, d1259# CHECK: vrintx.f16 q0, q1260[0x81,0x04,0xb6,0xf3]261[0xc2,0x04,0xb6,0xf3]262 263# CHECK: vrintz.f16 d0, d1264# CHECK: vrintz.f16 q0, q1265[0x81,0x05,0xb6,0xf3]266[0xc2,0x05,0xb6,0xf3]267 268# Existing VMOV(immediate, Advanced SIMD) instructions within the encoding269# space of the new FP16 VCVT(between floating - point and fixed - point,270# Advanced SIMD):271# 4 -- Q272# 2 -- VMOV op273# 1 -- VCVT op274# 2 -- VCVT FP size275[0x10,0x0c,0xc7,0xf2]276[0x10,0x0d,0xc7,0xf2]277[0x10,0x0e,0xc7,0xf2]278[0x10,0x0f,0xc7,0xf2]279[0x20,0x0c,0xc7,0xf2]280[0x20,0x0d,0xc7,0xf2]281[0x20,0x0e,0xc7,0xf2]282[0x20,0x0f,0xc7,0xf2]283[0x50,0x0c,0xc7,0xf2]284[0x50,0x0d,0xc7,0xf2]285[0x50,0x0e,0xc7,0xf2]286[0x50,0x0f,0xc7,0xf2]287[0x70,0x0c,0xc7,0xf2]288[0x70,0x0d,0xc7,0xf2]289[0x70,0x0e,0xc7,0xf2]290[0x70,0x0f,0xc7,0xf2]291# CHECK: vmov.i32 d16, #0x70ff292# CHECK: vmov.i32 d16, #0x70ffff293# CHECK: vmov.i8 d16, #0x70294# CHECK: vmov.f32 d16, #1.000000e+00295# CHECK: vmull.s8 q8, d7, d16296# STDERR: warning: invalid instruction encoding297# STDERR-NEXT: [0x20,0x0d,0xc7,0xf2]298# CHECK: vmull.p8 q8, d7, d16299# STDERR: warning: invalid instruction encoding300# STDERR-NEXT: [0x20,0x0f,0xc7,0xf2]301# CHECK: vmov.i32 q8, #0x70ff302# CHECK: vmov.i32 q8, #0x70ffff303# CHECK: vmov.i8 q8, #0x70304# CHECK: vmov.f32 q8, #1.000000e+00305# CHECK: vmvn.i32 q8, #0x70ff306# CHECK: vmvn.i32 q8, #0x70ffff307# CHECK: vmov.i64 q8, #0xffffff0000000308# STDERR: warning: invalid instruction encoding309# STDERR-NEXT: [0x70,0x0f,0xc7,0xf2]310