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1# RUN: llvm-mc --disassemble %s -triple=riscv32be -mattr=+c 2>&1 | FileCheck %s2# RUN: llvm-mc --disassemble %s -triple=riscv64be -mattr=+c 2>&1 | FileCheck %s3 4# Test basic disassembly for big-endian RISC-V5# Instructions are always little-endian encoded in RISC-V6 7[0x13,0x05,0x45,0x06]8# CHECK: addi a0, a0, 1009 10[0xb7,0x52,0x34,0x12]11# CHECK: lui t0, 7456512 13[0x03,0x26,0x05,0x00]14# CHECK: lw a2, 0(a0)15 16[0x23,0x22,0xc5,0x00]17# CHECK: sw a2, 4(a0)18 19[0xef,0x00,0x00,0x00]20# CHECK: jal 021 22[0x63,0x00,0xb5,0x00]23# CHECK: beq a0, a1, 024 25[0x01,0x00]26# CHECK: nop27 28[0x05,0x05]29# CHECK: addi a0, a0, 130