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1# RUN: llvm-mc -triple=xtensa -mattr=+timers3 -disassemble %s | FileCheck -check-prefixes=CHECK-TIMER %s2# RUN: not llvm-mc -triple=xtensa -disassemble %s 2>&1 | FileCheck --implicit-check-not=warning: -check-prefixes=CHECK-CORE %s3 4## Verify that binary code is correctly disassembled with5## Xtensa timer option enabled. Also verify that dissasembling without6## Xtensa timer option generates warnings.7 8[0x20,0xea,0x61]9#CHECK-INST: xsr a2, ccount10#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding11 12[0x20,0xf0,0x61]13#CHECK-TIMER: xsr a2, ccompare014#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding15 16[0x20,0xf1,0x61]17#CHECK-TIMER: xsr a2, ccompare118#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding19 20[0x20,0xf2,0x61]21#CHECK-TIMER: xsr a2, ccompare222#CHECK-CORE: [[#@LINE-2]]:2: warning: invalid instruction encoding23