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1# RUN: llvm-mc -filetype=obj -triple=hexagon -mcpu=hexagonv67 -mhvx %s | llvm-objdump --no-print-imm-hex -d --mcpu=hexagonv67 --mattr=+hvx - | FileCheck %s2# RUN: not llvm-mc -triple=hexagon -mcpu=hexagonv65 -mhvx -filetype=asm %s 2>%t; FileCheck --check-prefix=CHECK-V65 --implicit-check-not="error:" %s <%t3 4v1:0.w = vadd(v0.h, v1.h) // Normal5# CHECK: 1ca1c0806 7v0:1.w = vadd(v0.h, v1.h) // Swapped8# CHECK-NEXT: 1ca1c0819# CHECK-V65: error: register pair `WR0' is not permitted for this architecture10 11## Swapped use:12v1:0.w = vtmpy(v0:1.h,r0.b)13# CHECK-NEXT: 19a0c18014# CHECK-V65: error: register pair `WR0' is not permitted for this architecture15 16## Swapped def17v0:1 = v3:218# CHECK-NEXT: 1f42c3e1 { v0:1 = vcombine(v3,v2) }19# CHECK-V65: error: register pair `WR0' is not permitted for this architecture20 21# Mapped instruction's swapped use:22v1:0 = v2:323# CHECK-NEXT: v1:0 = vcombine(v2,v3)24## No error for v65, this is now permitted!25 26## .new producer from pair:27{28 v0:1 = vaddw(v0:1, v0:1)29 if (!p0) vmem(r0+#0)=v0.new30}31# CHECK-NEXT: v0:1.w = vadd(v0:1.w,v0:1.w)32# CHECK-NEXT: if (!p0) vmem(r0+#0) = v0.new33# CHECK-V65: error: register pair `WR0' is not permitted for this architecture34 35## Used .tmp, swapped use & def:36{37 v0.tmp = vmem(r0 + #3)38 v2:3 = vaddw(v0:1, v0:1)39}40# CHECK-NEXT: 1c6141c3 { v2:3.w = vadd(v0:1.w,v0:1.w)41# CHECK-NEXT: v0.tmp = vmem(r0+#3) }42# CHECK-V65: error: register pair `WR0' is not permitted for this architecture43# CHECK-V65: error: register pair `WR1' is not permitted for this architecture44