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1; RUN: llc -mtriple=mips64el -filetype=obj -mcpu=mips64r2 -disable-mips-delay-filler %s -o - \2; RUN: | llvm-objdump --no-print-imm-hex -d - | FileCheck %s3 4; RUN: llc -mtriple=mips64el -filetype=obj -mcpu=mips64r2 %s -o - \5; RUN: | llvm-objdump --no-print-imm-hex -d - | FileCheck %s6 7define i64 @f3(i64 %a0) nounwind readnone {8entry:9; CHECK: dsll ${{[0-9]+}}, ${{[0-9]+}}, 1010 %shl = shl i64 %a0, 1011 ret i64 %shl12}13 14define i64 @f4(i64 %a0) nounwind readnone {15entry:16; CHECK: dsra ${{[0-9]+}}, ${{[0-9]+}}, 1017 %shr = ashr i64 %a0, 1018 ret i64 %shr19}20 21define i64 @f5(i64 %a0) nounwind readnone {22entry:23; CHECK: dsrl ${{[0-9]+}}, ${{[0-9]+}}, 1024 %shr = lshr i64 %a0, 1025 ret i64 %shr26}27 28define i64 @f6(i64 %a0) nounwind readnone {29entry:30; CHECK: dsll32 ${{[0-9]+}}, ${{[0-9]+}}, 831 %shl = shl i64 %a0, 4032 ret i64 %shl33}34 35define i64 @f7(i64 %a0) nounwind readnone {36entry:37; CHECK: dsra32 ${{[0-9]+}}, ${{[0-9]+}}, 838 %shr = ashr i64 %a0, 4039 ret i64 %shr40}41 42define i64 @f8(i64 %a0) nounwind readnone {43entry:44; CHECK: dsrl32 ${{[0-9]+}}, ${{[0-9]+}}, 845 %shr = lshr i64 %a0, 4046 ret i64 %shr47}48 49