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1# RUN: llvm-mc -filetype=obj -triple=mipsel %s | llvm-readobj -r - | FileCheck %s2 3# Test the order of records in the relocation table.4#5# MIPS has a few relocations that have an AHL component in the expression used6# to evaluate them. This AHL component is an addend with the same number of7# bits as a symbol value but not all of our ABI's are able to supply a8# sufficiently sized addend in a single relocation.9#10# The O32 ABI for example, uses REL relocations which store the addend in the11# section data. All the relocations with AHL components affect 16-bit fields12# so the addend is limited to 16-bit. This ABI resolves the limitation by13# linking relocations (e.g. R_MIPS_HI16 and R_MIPS_LO16) and distributing the14# addend between the linked relocations. The ABI mandates that such relocations15# must be next to each other in a particular order (e.g. R_MIPS_HI16 must be16# followed by a matching R_MIPS_LO16) but the rule is less strict in practice.17#18# See MipsELFObjectWriter.cpp for a full description of the rules.19#20# TODO: Add mips16 and micromips tests.21 22# HILO 1: HI/LO already match23 .section .mips_hilo_1, "ax", @progbits24 lui $2, %hi(sym1)25 addiu $2, $2, %lo(sym1)26 27# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_1 {28# CHECK-NEXT: 0x0 R_MIPS_HI16 sym129# CHECK-NEXT: 0x4 R_MIPS_LO16 sym130# CHECK-NEXT: }31 32# HILO 2: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.33 .section .mips_hilo_2, "ax", @progbits34 addiu $2, $2, %lo(sym1)35 lui $2, %hi(sym1)36 37# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_2 {38# CHECK-NEXT: 0x4 R_MIPS_HI16 sym139# CHECK-NEXT: 0x0 R_MIPS_LO16 sym140# CHECK-NEXT: }41 42# HILO 3: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.43# The second relocation matches if the symbol is the same.44 .section .mips_hilo_3, "ax", @progbits45 addiu $2, $2, %lo(sym1)46 lui $2, %hi(sym2)47 addiu $2, $2, %lo(sym2)48 lui $2, %hi(sym1)49 50# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_3 {51# CHECK-NEXT: 0xC R_MIPS_HI16 sym152# CHECK-NEXT: 0x0 R_MIPS_LO16 sym153# CHECK-NEXT: 0x4 R_MIPS_HI16 sym254# CHECK-NEXT: 0x8 R_MIPS_LO16 sym255# CHECK-NEXT: }56 57# HILO 3b: Same as 3 but a different starting order.58 .section .mips_hilo_3b, "ax", @progbits59 addiu $2, $2, %lo(sym1)60 lui $2, %hi(sym1)61 addiu $2, $2, %lo(sym2)62 lui $2, %hi(sym2)63 64# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_3b {65# CHECK-NEXT: 0x4 R_MIPS_HI16 sym166# CHECK-NEXT: 0x0 R_MIPS_LO16 sym167# CHECK-NEXT: 0xC R_MIPS_HI16 sym268# CHECK-NEXT: 0x8 R_MIPS_LO16 sym269# CHECK-NEXT: }70 71# HILO 4: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.72# The second relocation matches if the symbol is the same and the73# offset is the same.74 .section .mips_hilo_4, "ax", @progbits75 addiu $2, $2, %lo(sym1)76 addiu $2, $2, %lo(sym1+4)77 lui $2, %hi(sym1+4)78 lui $2, %hi(sym1)79 80# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_4 {81# CHECK-NEXT: 0xC R_MIPS_HI16 sym182# CHECK-NEXT: 0x0 R_MIPS_LO16 sym183# CHECK-NEXT: 0x8 R_MIPS_HI16 sym184# CHECK-NEXT: 0x4 R_MIPS_LO16 sym185# CHECK-NEXT: }86 87# HILO 5: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.88# The second relocation matches if the symbol is the same and the89# offset is greater or equal. Exact matches are preferred so both90# R_MIPS_HI16's match the same R_MIPS_LO16.91 .section .mips_hilo_5, "ax", @progbits92 lui $2, %hi(sym1)93 lui $2, %hi(sym1)94 addiu $2, $2, %lo(sym1+1)95 addiu $2, $2, %lo(sym1)96 97# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_5 {98# CHECK-NEXT: 0x8 R_MIPS_LO16 sym199# CHECK-NEXT: 0x0 R_MIPS_HI16 sym1100# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1101# CHECK-NEXT: 0xC R_MIPS_LO16 sym1102# CHECK-NEXT: }103 104# HILO 6: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.105# The second relocation matches if the symbol is the same and the106# offset is greater or equal. Smaller offsets are preferred so both107# R_MIPS_HI16's still match the same R_MIPS_LO16.108 .section .mips_hilo_6, "ax", @progbits109 lui $2, %hi(sym1)110 lui $2, %hi(sym1)111 addiu $2, $2, %lo(sym1+2)112 addiu $2, $2, %lo(sym1+1)113 114# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_6 {115# CHECK-NEXT: 0x8 R_MIPS_LO16 sym1116# CHECK-NEXT: 0x0 R_MIPS_HI16 sym1117# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1118# CHECK-NEXT: 0xC R_MIPS_LO16 sym1119# CHECK-NEXT: }120 121# HILO 7: R_MIPS_HI16 must be followed by a matching R_MIPS_LO16.122# The second relocation matches if the symbol is the same and the123# offset is greater or equal so that the carry bit is correct. The two124# R_MIPS_HI16's therefore match different R_MIPS_LO16's.125 .section .mips_hilo_7, "ax", @progbits126 addiu $2, $2, %lo(sym1+1)127 addiu $2, $2, %lo(sym1+6)128 lui $2, %hi(sym1+4)129 lui $2, %hi(sym1)130 131# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_7 {132# CHECK-NEXT: 0xC R_MIPS_HI16 sym1133# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1134# CHECK-NEXT: 0x8 R_MIPS_HI16 sym1135# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1136# CHECK-NEXT: }137 138# HILO 8: R_MIPS_LO16's may be orphaned.139 .section .mips_hilo_8, "ax", @progbits140 lw $2, %lo(sym1)141 142# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_8 {143# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1144# CHECK-NEXT: }145 146# HILO 8b: Another example of 8. The R_MIPS_LO16 at 0x4 is orphaned.147 .section .mips_hilo_8b, "ax", @progbits148 lw $2, %lo(sym1)149 lw $2, %lo(sym1)150 lui $2, %hi(sym1)151 152# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_8b {153# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1154# CHECK-NEXT: 0x8 R_MIPS_HI16 sym1155# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1156# CHECK-NEXT: }157 158# HILO 9: R_MIPS_HI16's don't need a matching R_MIPS_LO16 to immediately follow159# so long as there is one after the R_MIPS_HI16 somewhere. This isn't160# permitted by the ABI specification but has been allowed in practice161# for a very long time. The R_MIPS_HI16's should be ordered by the162# address they affect for purely cosmetic reasons.163 .section .mips_hilo_9, "ax", @progbits164 lw $2, %lo(sym1)165 lui $2, %hi(sym1)166 lui $2, %hi(sym1)167 168# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_9 {169# CHECK-NEXT: 0x4 R_MIPS_HI16 sym1170# CHECK-NEXT: 0x8 R_MIPS_HI16 sym1171# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1172# CHECK-NEXT: }173 174# HILO 10: R_MIPS_HI16's must have a matching R_MIPS_LO16 somewhere though.175# When this is impossible we have two possible bad behaviours176# depending on the linker implementation:177# * The linker silently computes the wrong value using a partially178# matching R_MIPS_LO16.179# * The linker rejects the relocation table as invalid.180# The latter is preferable since it's far easier to detect and debug so181# check that we encourage this behaviour by putting invalid182# R_MIPS_HI16's at the end of the relocation table where the risk of a183# partial match is very low.184 .section .mips_hilo_10, "ax", @progbits185 lui $2, %hi(sym1)186 lw $2, %lo(sym1)187 lui $2, %hi(sym2)188 lui $2, %hi(sym3)189 lw $2, %lo(sym3)190 191# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_hilo_10 {192# CHECK-NEXT: 0x0 R_MIPS_HI16 sym1193# CHECK-NEXT: 0x4 R_MIPS_LO16 sym1194# CHECK-NEXT: 0xC R_MIPS_HI16 sym3195# CHECK-NEXT: 0x10 R_MIPS_LO16 sym3196# CHECK-NEXT: 0x8 R_MIPS_HI16 sym2197# CHECK-NEXT: }198 199# Now do the same tests for GOT/LO.200# The rules only apply to R_MIPS_GOT16 on local symbols which are also201# rewritten into section relative relocations.202 203# GOTLO 1: GOT/LO already match204 .section .mips_gotlo_1, "ax", @progbits205 lui $2, %got(local1)206 addiu $2, $2, %lo(local1)207 208# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_1 {209# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text210# CHECK-NEXT: 0x4 R_MIPS_LO16 .text211# CHECK-NEXT: }212 213# GOTLO 2: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.214 .section .mips_gotlo_2, "ax", @progbits215 addiu $2, $2, %lo(local1)216 lui $2, %got(local1)217 218# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_2 {219# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text220# CHECK-NEXT: 0x0 R_MIPS_LO16 .text221# CHECK-NEXT: }222 223# GOTLO 3: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.224# The second relocation matches if the symbol is the same.225 .section .mips_gotlo_3, "ax", @progbits226 addiu $2, $2, %lo(local1)227 lui $2, %got(local2)228 addiu $2, $2, %lo(local2)229 lui $2, %got(local1)230 231# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_3 {232# CHECK-NEXT: 0xC R_MIPS_GOT16 .text233# CHECK-NEXT: 0x0 R_MIPS_LO16 .text234# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text235# CHECK-NEXT: 0x8 R_MIPS_LO16 .text236# CHECK-NEXT: }237 238# GOTLO 3b: Same as 3 but a different starting order.239 .section .mips_gotlo_3b, "ax", @progbits240 addiu $2, $2, %lo(local1)241 lui $2, %got(local1)242 addiu $2, $2, %lo(local2)243 lui $2, %got(local2)244 245# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_3b {246# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text247# CHECK-NEXT: 0x0 R_MIPS_LO16 .text248# CHECK-NEXT: 0xC R_MIPS_GOT16 .text249# CHECK-NEXT: 0x8 R_MIPS_LO16 .text250# CHECK-NEXT: }251 252# GOTLO 4: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.253# The second relocation matches if the symbol is the same and the254# offset is the same.255 .section .mips_gotlo_4, "ax", @progbits256 addiu $2, $2, %lo(local1)257 addiu $2, $2, %lo(local1+4)258 lui $2, %got(local1+4)259 lui $2, %got(local1)260 261# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_4 {262# CHECK-NEXT: 0xC R_MIPS_GOT16 .text263# CHECK-NEXT: 0x0 R_MIPS_LO16 .text264# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text265# CHECK-NEXT: 0x4 R_MIPS_LO16 .text266# CHECK-NEXT: }267 268# GOTLO 5: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.269# The second relocation matches if the symbol is the same and the270# offset is greater or equal. Exact matches are preferred so both271# R_MIPS_GOT16's match the same R_MIPS_LO16.272 .section .mips_gotlo_5, "ax", @progbits273 lui $2, %got(local1)274 lui $2, %got(local1)275 addiu $2, $2, %lo(local1+1)276 addiu $2, $2, %lo(local1)277 278# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_5 {279# CHECK-NEXT: 0x8 R_MIPS_LO16 .text280# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text281# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text282# CHECK-NEXT: 0xC R_MIPS_LO16 .text283# CHECK-NEXT: }284 285# GOTLO 6: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.286# The second relocation matches if the symbol is the same and the287# offset is greater or equal. Smaller offsets are preferred so both288# R_MIPS_GOT16's still match the same R_MIPS_LO16.289 .section .mips_gotlo_6, "ax", @progbits290 lui $2, %got(local1)291 lui $2, %got(local1)292 addiu $2, $2, %lo(local1+2)293 addiu $2, $2, %lo(local1+1)294 295# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_6 {296# CHECK-NEXT: 0x8 R_MIPS_LO16 .text297# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text298# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text299# CHECK-NEXT: 0xC R_MIPS_LO16 .text300# CHECK-NEXT: }301 302# GOTLO 7: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.303# The second relocation matches if the symbol is the same and the304# offset is greater or equal so that the carry bit is correct. The two305# R_MIPS_GOT16's therefore match different R_MIPS_LO16's.306 .section .mips_gotlo_7, "ax", @progbits307 addiu $2, $2, %lo(local1+1)308 addiu $2, $2, %lo(local1+6)309 lui $2, %got(local1+4)310 lui $2, %got(local1)311 312# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_7 {313# CHECK-NEXT: 0xC R_MIPS_GOT16 .text314# CHECK-NEXT: 0x0 R_MIPS_LO16 .text315# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text316# CHECK-NEXT: 0x4 R_MIPS_LO16 .text317# CHECK-NEXT: }318 319# GOTLO 8: R_MIPS_LO16's may be orphaned.320 .section .mips_gotlo_8, "ax", @progbits321 lw $2, %lo(local1)322 323# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_8 {324# CHECK-NEXT: 0x0 R_MIPS_LO16 .text325# CHECK-NEXT: }326 327# GOTLO 8b: Another example of 8. The R_MIPS_LO16 at 0x4 is orphaned.328 .section .mips_gotlo_8b, "ax", @progbits329 lw $2, %lo(local1)330 lw $2, %lo(local1)331 lui $2, %got(local1)332 333# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_8b {334# CHECK-NEXT: 0x0 R_MIPS_LO16 .text335# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text336# CHECK-NEXT: 0x4 R_MIPS_LO16 .text337# CHECK-NEXT: }338 339# GOTLO 9: R_MIPS_GOT16's don't need a matching R_MIPS_LO16 to immediately340# follow so long as there is one after the R_MIPS_GOT16 somewhere.341# This isn't permitted by the ABI specification but has been allowed342# in practice for a very long time. The R_MIPS_GOT16's should be343# ordered by the address they affect for purely cosmetic reasons.344 .section .mips_gotlo_9, "ax", @progbits345 lw $2, %lo(local1)346 lui $2, %got(local1)347 lui $2, %got(local1)348 349# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_9 {350# CHECK-NEXT: 0x4 R_MIPS_GOT16 .text351# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text352# CHECK-NEXT: 0x0 R_MIPS_LO16 .text353# CHECK-NEXT: }354 355# GOTLO 10: R_MIPS_GOT16's must have a matching R_MIPS_LO16 somewhere though.356# When this is impossible we have two possible bad behaviours357# depending on the linker implementation:358# * The linker silently computes the wrong value using a partially359# matching R_MIPS_LO16.360# * The linker rejects the relocation table as invalid.361# The latter is preferable since it's far easier to detect and debug362# so check that we encourage this behaviour by putting invalid363# R_MIPS_GOT16's at the end of the relocation table where the risk of364# a partial match is very low.365 .section .mips_gotlo_10, "ax", @progbits366 lui $2, %got(local1)367 lw $2, %lo(local1)368 lui $2, %got(local2)369 lui $2, %got(local3)370 lw $2, %lo(local3)371 372# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_gotlo_10 {373# CHECK-NEXT: 0x0 R_MIPS_GOT16 .text374# CHECK-NEXT: 0x4 R_MIPS_LO16 .text375# CHECK-NEXT: 0x8 R_MIPS_GOT16 .text376# CHECK-NEXT: 0xC R_MIPS_GOT16 .text377# CHECK-NEXT: 0x10 R_MIPS_LO16 .text378# CHECK-NEXT: }379 380# Finally, do test 2 for R_MIPS_GOT16 on external symbols to prove they are381# exempt from the rules for local symbols.382 383# External GOTLO 2: R_MIPS_GOT16 must be followed by a matching R_MIPS_LO16.384 .section .mips_ext_gotlo_2, "ax", @progbits385 addiu $2, $2, %lo(sym1)386 lui $2, %got(sym1)387 388# CHECK-LABEL: Section ({{[0-9]+}}) .rel.mips_ext_gotlo_2 {389# CHECK-NEXT: 0x0 R_MIPS_LO16 sym1390# CHECK-NEXT: 0x4 R_MIPS_GOT16 sym1391# CHECK-NEXT: }392 393# Define some local symbols.394 .text395 nop396local1: nop397local2: nop398local3: nop399