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1# RUN: llvm-mc -triple=riscv32 --mattr=+xcvbitmanip -show-encoding %s \2# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INSTR3# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+xcvbitmanip < %s \4# RUN: | llvm-objdump --mattr=+xcvbitmanip --no-print-imm-hex -M no-aliases -d -r - \5# RUN: | FileCheck --check-prefix=CHECK-INSTR %s6# RUN: not llvm-mc -triple riscv32 %s 2>&1 \7# RUN: | FileCheck -check-prefix=CHECK-NO-EXT %s8 9cv.extract t0, t1, 0, 110# CHECK-INSTR: cv.extract t0, t1, 0, 111# CHECK-ENCODING: [0xdb,0x02,0x13,0x00]12# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}13 14cv.extract a0, a1, 17, 1815# CHECK-INSTR: cv.extract a0, a1, 17, 1816# CHECK-ENCODING: [0x5b,0x85,0x25,0x23]17# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}18 19cv.extract s0, s1, 30, 3120# CHECK-INSTR: cv.extract s0, s1, 30, 3121# CHECK-ENCODING: [0x5b,0x84,0xf4,0x3d]22# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}23 24cv.extractu t0, t1, 0, 125# CHECK-INSTR: cv.extractu t0, t1, 0, 126# CHECK-ENCODING: [0xdb,0x02,0x13,0x40]27# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}28 29cv.extractu a0, a1, 17, 1830# CHECK-INSTR: cv.extractu a0, a1, 17, 1831# CHECK-ENCODING: [0x5b,0x85,0x25,0x63]32# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}33 34cv.extractu s0, s1, 30, 3135# CHECK-INSTR: cv.extractu s0, s1, 30, 3136# CHECK-ENCODING: [0x5b,0x84,0xf4,0x7d]37# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}38 39cv.insert t0, t1, 0, 140# CHECK-INSTR: cv.insert t0, t1, 0, 141# CHECK-ENCODING: [0xdb,0x02,0x13,0x80]42# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}43 44cv.insert a0, a1, 17, 1845# CHECK-INSTR: cv.insert a0, a1, 17, 1846# CHECK-ENCODING: [0x5b,0x85,0x25,0xa3]47# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}48 49cv.insert s0, s1, 30, 3150# CHECK-INSTR: cv.insert s0, s1, 30, 3151# CHECK-ENCODING: [0x5b,0x84,0xf4,0xbd]52# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}53 54cv.bclr t0, t1, 0, 155# CHECK-INSTR: cv.bclr t0, t1, 0, 156# CHECK-ENCODING: [0xdb,0x12,0x13,0x00]57# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}58 59cv.bclr a0, a1, 17, 1860# CHECK-INSTR: cv.bclr a0, a1, 17, 1861# CHECK-ENCODING: [0x5b,0x95,0x25,0x23]62# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}63 64cv.bclr s0, s1, 30, 3165# CHECK-INSTR: cv.bclr s0, s1, 30, 3166# CHECK-ENCODING: [0x5b,0x94,0xf4,0x3d]67# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}68 69cv.bset t0, t1, 0, 170# CHECK-INSTR: cv.bset t0, t1, 0, 171# CHECK-ENCODING: [0xdb,0x12,0x13,0x40]72# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}73 74cv.bset a0, a1, 17, 1875# CHECK-INSTR: cv.bset a0, a1, 17, 1876# CHECK-ENCODING: [0x5b,0x95,0x25,0x63]77# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}78 79cv.bset s0, s1, 30, 3180# CHECK-INSTR: cv.bset s0, s1, 30, 3181# CHECK-ENCODING: [0x5b,0x94,0xf4,0x7d]82# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}83 84cv.bitrev t0, t1, 0, 185# CHECK-INSTR: cv.bitrev t0, t1, 0, 186# CHECK-ENCODING: [0xdb,0x12,0x13,0xc0]87# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}88 89cv.bitrev a0, a1, 1, 1890# CHECK-INSTR: cv.bitrev a0, a1, 1, 1891# CHECK-ENCODING: [0x5b,0x95,0x25,0xc3]92# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}93 94cv.bitrev s0, s1, 2, 3195# CHECK-INSTR: cv.bitrev s0, s1, 2, 3196# CHECK-ENCODING: [0x5b,0x94,0xf4,0xc5]97# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}98 99cv.extractr t0, t1, t2100# CHECK-INSTR: cv.extractr t0, t1, t2101# CHECK-ENCODING: [0xab,0x32,0x73,0x30]102# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}103 104cv.extractr a0, a1, a2105# CHECK-INSTR: cv.extractr a0, a1, a2106# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x30]107# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}108 109cv.extractr s0, s1, s2110# CHECK-INSTR: cv.extractr s0, s1, s2111# CHECK-ENCODING: [0x2b,0xb4,0x24,0x31]112# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}113 114cv.extractur t0, t1, t2115# CHECK-INSTR: cv.extractur t0, t1, t2116# CHECK-ENCODING: [0xab,0x32,0x73,0x32]117# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}118 119cv.extractur a0, a1, a2120# CHECK-INSTR: cv.extractur a0, a1, a2121# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x32]122# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}123 124cv.extractur s0, s1, s2125# CHECK-INSTR: cv.extractur s0, s1, s2126# CHECK-ENCODING: [0x2b,0xb4,0x24,0x33]127# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}128 129cv.insertr t0, t1, t2130# CHECK-INSTR: cv.insertr t0, t1, t2131# CHECK-ENCODING: [0xab,0x32,0x73,0x34]132# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}133 134cv.insertr a0, a1, a2135# CHECK-INSTR: cv.insertr a0, a1, a2136# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x34]137# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}138 139cv.insertr s0, s1, s2140# CHECK-INSTR: cv.insertr s0, s1, s2141# CHECK-ENCODING: [0x2b,0xb4,0x24,0x35]142# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}143 144cv.bclrr t0, t1, t2145# CHECK-INSTR: cv.bclrr t0, t1, t2146# CHECK-ENCODING: [0xab,0x32,0x73,0x38]147# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}148 149cv.bclrr a0, a1, a2150# CHECK-INSTR: cv.bclrr a0, a1, a2151# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x38]152# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}153 154cv.bclrr s0, s1, s2155# CHECK-INSTR: cv.bclrr s0, s1, s2156# CHECK-ENCODING: [0x2b,0xb4,0x24,0x39]157# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}158 159cv.bsetr t0, t1, t2160# CHECK-INSTR: cv.bsetr t0, t1, t2161# CHECK-ENCODING: [0xab,0x32,0x73,0x3a]162# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}163 164cv.bsetr a0, a1, a2165# CHECK-INSTR: cv.bsetr a0, a1, a2166# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x3a]167# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}168 169cv.bsetr s0, s1, s2170# CHECK-INSTR: cv.bsetr s0, s1, s2171# CHECK-ENCODING: [0x2b,0xb4,0x24,0x3b]172# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}173 174cv.ror t0, t1, t2175# CHECK-INSTR: cv.ror t0, t1, t2176# CHECK-ENCODING: [0xab,0x32,0x73,0x40]177# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}178 179cv.ror a0, a1, a2180# CHECK-INSTR: cv.ror a0, a1, a2181# CHECK-ENCODING: [0x2b,0xb5,0xc5,0x40]182# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}183 184cv.ror s0, s1, s2185# CHECK-INSTR: cv.ror s0, s1, s2186# CHECK-ENCODING: [0x2b,0xb4,0x24,0x41]187# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}188 189cv.ff1 t0, t1190# CHECK-INSTR: cv.ff1 t0, t1191# CHECK-ENCODING: [0xab,0x32,0x03,0x42]192# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}193 194cv.ff1 a0, a1195# CHECK-INSTR: cv.ff1 a0, a1196# CHECK-ENCODING: [0x2b,0xb5,0x05,0x42]197# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}198 199cv.ff1 s0, s1200# CHECK-INSTR: cv.ff1 s0, s1201# CHECK-ENCODING: [0x2b,0xb4,0x04,0x42]202# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}203 204cv.fl1 t0, t1205# CHECK-INSTR: cv.fl1 t0, t1206# CHECK-ENCODING: [0xab,0x32,0x03,0x44]207# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}208 209cv.fl1 a0, a1210# CHECK-INSTR: cv.fl1 a0, a1211# CHECK-ENCODING: [0x2b,0xb5,0x05,0x44]212# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}213 214cv.fl1 s0, s1215# CHECK-INSTR: cv.fl1 s0, s1216# CHECK-ENCODING: [0x2b,0xb4,0x04,0x44]217# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}218 219cv.clb t0, t1220# CHECK-INSTR: cv.clb t0, t1221# CHECK-ENCODING: [0xab,0x32,0x03,0x46]222# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}223 224cv.clb a0, a1225# CHECK-INSTR: cv.clb a0, a1226# CHECK-ENCODING: [0x2b,0xb5,0x05,0x46]227# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}228 229cv.clb s0, s1230# CHECK-INSTR: cv.clb s0, s1231# CHECK-ENCODING: [0x2b,0xb4,0x04,0x46]232# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}233 234cv.cnt t0, t1235# CHECK-INSTR: cv.cnt t0, t1236# CHECK-ENCODING: [0xab,0x32,0x03,0x48]237# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}238 239cv.cnt a0, a1240# CHECK-INSTR: cv.cnt a0, a1241# CHECK-ENCODING: [0x2b,0xb5,0x05,0x48]242# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}243 244cv.cnt s0, s1245# CHECK-INSTR: cv.cnt s0, s1246# CHECK-ENCODING: [0x2b,0xb4,0x04,0x48]247# CHECK-NO-EXT: instruction requires the following: 'XCVbitmanip' (CORE-V Bit Manipulation){{$}}248 249