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1# RUN: not llvm-mc -triple riscv32 -mattr=+zdinx %s 2>&1 | FileCheck %s2 3# Unsupport Odd Registers in RV324fadd.d a0, a1, a2 # CHECK: :[[@LINE]]:12: error: double precision floating point operands must use even numbered X register5 6# Not support float registers7flw fa4, 12(sp) # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'F' (Single-Precision Floating-Point){{$}}8fadd.d fa0, fa1, fa2 # CHECK: :[[@LINE]]:1: error: instruction requires the following: 'D' (Double-Precision Floating-Point){{$}}9 10# Invalid instructions11fsw a5, 12(sp) # CHECK: :[[@LINE]]:5: error: invalid operand for instruction12fmv.x.w s0, s1 # CHECK: :[[@LINE]]:13: error: invalid operand for instruction13 14# Invalid register names15fadd.d a100, a2, a4 # CHECK: :[[@LINE]]:8: error: invalid operand for instruction16fsgnjn.d a100, a2, a4 # CHECK: :[[@LINE]]:10: error: invalid operand for instruction17 18# Rounding mode when a register is expected19fmadd.d x10, x12, x14, ree # CHECK: :[[@LINE]]:24: error: invalid operand for instruction20 21# Invalid rounding modes22fmadd.d x10, x12, x14, x16, ree # CHECK: :[[@LINE]]:29: error: operand must be a valid floating point rounding mode mnemonic23fmsub.d x10, x12, x14, x16, 0 # CHECK: :[[@LINE]]:29: error: operand must be a valid floating point rounding mode mnemonic24fnmsub.d x10, x12, x14, x16, 0b111 # CHECK: :[[@LINE]]:30: error: operand must be a valid floating point rounding mode mnemonic25 26# FP registers where integer regs are expected27fcvt.wu.d ft2, a2 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction28