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1# RUN: llvm-mc %s -triple=riscv64 -M no-aliases -mattr=+e -show-encoding \2# RUN: | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s3# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+e < %s \4# RUN: | llvm-objdump --no-print-imm-hex -M no-aliases -d -r - \5# RUN: | FileCheck -check-prefixes=CHECK-ASM-AND-OBJ %s6 7# This file provides a basic test for RV64E, checking that the expected8# set of registers and instructions are accepted. It only tests instructions9# that are not valid in RV32E.10 11# CHECK-ASM-AND-OBJ: ld a4, 25(a5)12ld x14, 25(x15)13# CHECK-ASM-AND-OBJ: sd a2, 36(a3)14sd a2, 36(a3)15 16# CHECK-ASM-AND-OBJ: addiw a4, a5, 3717addiw a4, a5, 3718# CHECK-ASM-AND-OBJ: slliw t1, t1, 3119slliw t1, t1, 3120# CHECK-ASM-AND-OBJ: srliw a0, a4, 021srliw a0, a4, 022# CHECK-ASM-AND-OBJ: sraiw a1, sp, 1523sraiw a1, sp, 1524# CHECK-ASM-AND-OBJ: slliw t0, t1, 1325slliw t0, t1, 1326 27# CHECK-ASM-AND-OBJ: addw ra, zero, zero28addw ra, zero, zero29# CHECK-ASM-AND-OBJ: subw t0, t2, t130subw t0, t2, t131# CHECK-ASM-AND-OBJ: sllw a5, a4, a332sllw a5, a4, a333# CHECK-ASM-AND-OBJ: srlw a0, s0, t034srlw a0, s0, t035# CHECK-ASM-AND-OBJ: sraw t0, a3, zero36sraw t0, a3, zero37