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1# RUN: llvm-mc %s -triple=riscv64 -mattr=+zdinx -M no-aliases -show-encoding \2# RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s3# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+zdinx %s \4# RUN:     | llvm-objdump --mattr=+zdinx -M no-aliases -d -r - \5# RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s6#7# RUN: not llvm-mc -triple riscv32 -mattr=+zdinx %s 2>&1 \8# RUN:     | FileCheck -check-prefix=CHECK-RV32 %s9 10# CHECK-ASM-AND-OBJ: fcvt.l.d a0, t0, dyn11# CHECK-ASM: encoding: [0x53,0xf5,0x22,0xc2]12# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set13fcvt.l.d a0, t0, dyn14# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, t1, dyn15# CHECK-ASM: encoding: [0xd3,0x75,0x33,0xc2]16# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set17fcvt.lu.d a1, t1, dyn18# CHECK-ASM-AND-OBJ: fcvt.d.l t3, a3, dyn19# CHECK-ASM: encoding: [0x53,0xfe,0x26,0xd2]20# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set21fcvt.d.l t3, a3, dyn22# CHECK-ASM-AND-OBJ: fcvt.d.lu t4, a4, dyn23# CHECK-ASM: encoding: [0xd3,0x7e,0x37,0xd2]24# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set25fcvt.d.lu t4, a4, dyn26 27# Rounding modes28# CHECK-ASM-AND-OBJ: fcvt.d.l t3, a3, rne29# CHECK-ASM: encoding: [0x53,0x8e,0x26,0xd2]30# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set31fcvt.d.l t3, a3, rne32# CHECK-ASM-AND-OBJ: fcvt.d.lu t4, a4, rtz33# CHECK-ASM: encoding: [0xd3,0x1e,0x37,0xd2]34# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set35fcvt.d.lu t4, a4, rtz36# CHECK-ASM-AND-OBJ: fcvt.l.d a0, t0, rdn37# CHECK-ASM: encoding: [0x53,0xa5,0x22,0xc2]38# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set39fcvt.l.d a0, t0, rdn40# CHECK-ASM-AND-OBJ: fcvt.lu.d a1, t1, rup41# CHECK-ASM: encoding: [0xd3,0x35,0x33,0xc2]42# CHECK-RV32: :[[#@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set43fcvt.lu.d a1, t1, rup44