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1# RUN: llvm-mc %s -triple=riscv32 -mattr=+d -M no-aliases \2# RUN: | FileCheck -check-prefix=CHECK-INST %s3# RUN: llvm-mc %s -triple=riscv32 -mattr=+d \4# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s5# RUN: llvm-mc %s -triple=riscv64 -mattr=+d -M no-aliases \6# RUN: | FileCheck -check-prefix=CHECK-INST %s7# RUN: llvm-mc %s -triple=riscv64 -mattr=+d \8# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s9# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+d < %s \10# RUN: | llvm-objdump -d --mattr=+d --no-print-imm-hex -M no-aliases - \11# RUN: | FileCheck -check-prefix=CHECK-INST %s12# RUN: llvm-mc -filetype=obj -triple riscv32 -mattr=+d < %s \13# RUN: | llvm-objdump -d --mattr=+d --no-print-imm-hex - \14# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s15# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+d < %s \16# RUN: | llvm-objdump -d --mattr=+d --no-print-imm-hex -M no-aliases - \17# RUN: | FileCheck -check-prefix=CHECK-INST %s18# RUN: llvm-mc -filetype=obj -triple riscv64 -mattr=+d < %s \19# RUN: | llvm-objdump -d --mattr=+d --no-print-imm-hex - \20# RUN: | FileCheck -check-prefix=CHECK-ALIAS %s21 22##===----------------------------------------------------------------------===##23## Assembler Pseudo Instructions (User-Level ISA, Version 2.2, Chapter 20)24##===----------------------------------------------------------------------===##25 26# CHECK-INST: fld ft0, 0(a0)27# CHECK-ALIAS: fld ft0, 0(a0)28fld f0, (a0)29# CHECK-INST: fsd ft0, 0(a0)30# CHECK-ALIAS: fsd ft0, 0(a0)31fsd f0, (a0)32 33# CHECK-INST: fsgnj.d ft0, ft1, ft134# CHECK-ALIAS: fmv.d ft0, ft135fmv.d f0, f136# CHECK-INST: fsgnjx.d ft1, ft2, ft237# CHECK-ALIAS: fabs.d ft1, ft238fabs.d f1, f239# CHECK-INST: fsgnjn.d ft2, ft3, ft340# CHECK-ALIAS: fneg.d ft2, ft341fneg.d f2, f342 43# CHECK-INST: flt.d tp, ft6, ft544# CHECK-ALIAS: flt.d tp, ft6, ft545fgt.d x4, f5, f646# CHECK-INST: fle.d t2, fs1, fs047# CHECK-ALIAS: fle.d t2, fs1, fs048fge.d x7, f8, f949 50# CHECK-INST: fld ft0, 0(a0)51# CHECK-ALIAS: fld ft0, 0(a0)52fld f0, (x10)53# CHECK-INST: fsd ft0, 0(a0)54# CHECK-ALIAS: fsd ft0, 0(a0)55fsd f0, (x10)56 57##===----------------------------------------------------------------------===##58## Aliases which omit the rounding mode.59##===----------------------------------------------------------------------===##60 61# CHECK-INST: fmadd.d fa0, fa1, fa2, fa3, dyn62# CHECK-ALIAS: fmadd.d fa0, fa1, fa2, fa3{{[[:space:]]}}63fmadd.d f10, f11, f12, f1364# CHECK-INST: fmsub.d fa4, fa5, fa6, fa7, dyn65# CHECK-ALIAS: fmsub.d fa4, fa5, fa6, fa7{{[[:space:]]}}66fmsub.d f14, f15, f16, f1767# CHECK-INST: fnmsub.d fs2, fs3, fs4, fs5, dyn68# CHECK-ALIAS: fnmsub.d fs2, fs3, fs4, fs5{{[[:space:]]}}69fnmsub.d f18, f19, f20, f2170# CHECK-INST: fnmadd.d fs6, fs7, fs8, fs9, dyn71# CHECK-ALIAS: fnmadd.d fs6, fs7, fs8, fs9{{[[:space:]]}}72fnmadd.d f22, f23, f24, f2573# CHECK-INST: fadd.d fs10, fs11, ft8, dyn74# CHECK-ALIAS: fadd.d fs10, fs11, ft8{{[[:space:]]}}75fadd.d f26, f27, f2876# CHECK-INST: fsub.d ft9, ft10, ft11, dyn77# CHECK-ALIAS: fsub.d ft9, ft10, ft11{{[[:space:]]}}78fsub.d f29, f30, f3179# CHECK-INST: fmul.d ft0, ft1, ft2, dyn80# CHECK-ALIAS: fmul.d ft0, ft1, ft2{{[[:space:]]}}81fmul.d ft0, ft1, ft282# CHECK-INST: fdiv.d ft3, ft4, ft5, dyn83# CHECK-ALIAS: fdiv.d ft3, ft4, ft5{{[[:space:]]}}84fdiv.d ft3, ft4, ft585# CHECK-INST: fsqrt.d ft6, ft7, dyn86# CHECK-ALIAS: fsqrt.d ft6, ft7{{[[:space:]]}}87fsqrt.d ft6, ft788# CHECK-INST: fcvt.s.d fs5, fs6, dyn89# CHECK-ALIAS: fcvt.s.d fs5, fs6{{[[:space:]]}}90fcvt.s.d fs5, fs691# CHECK-INST: fcvt.w.d a4, ft11, dyn92# CHECK-ALIAS: fcvt.w.d a4, ft11{{[[:space:]]}}93fcvt.w.d a4, ft1194# CHECK-INST: fcvt.wu.d a5, ft10, dyn95# CHECK-ALIAS: fcvt.wu.d a5, ft10{{[[:space:]]}}96fcvt.wu.d a5, ft1097