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1# RUN: llvm-mc %s -triple=riscv32 -M no-aliases -mattr=+e -show-encoding \2# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s3# RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+e < %s \4# RUN: | llvm-objdump --no-print-imm-hex -M no-aliases -d -r - \5# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s6# RUN: llvm-mc %s -triple=riscv64 -M no-aliases -mattr=+e -show-encoding \7# RUN: | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s8# RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+e < %s \9# RUN: | llvm-objdump --no-print-imm-hex -M no-aliases -d -r - \10# RUN: | FileCheck -check-prefixes=CHECK-OBJ,CHECK-ASM-AND-OBJ %s11 12# This file provides a basic test for RV32E, checking that the expected13# set of registers and instructions are accepted.14 15# CHECK-ASM-AND-OBJ: lui zero, 116lui x0, 117# CHECK-ASM-AND-OBJ: auipc ra, 218auipc x1, 219 20# CHECK-OBJ: jal sp, 0xc21# CHECK-ASM: jal sp, 422jal x2, 423# CHECK-ASM-AND-OBJ: jalr gp, 4(gp)24jalr x3, x3, 425 26# CHECK-OBJ: beq tp, t0, 0x1827# CHECK-ASM: beq tp, t0, 828beq x4, x5, 829# CHECK-OBJ: bne t1, t2, 0x2030# CHECK-ASM: bne t1, t2, 1231bne x6, x7, 1232# CHECK-OBJ: blt s0, s1, 0x2833# CHECK-ASM: blt s0, s1, 1634blt x8, x9, 1635# CHECK-OBJ: bge a0, a1, 0x3036# CHECK-ASM: bge a0, a1, 2037bge x10, x11, 2038# CHECK-OBJ: bgeu a2, a3, 0x3839# CHECK-ASM: bgeu a2, a3, 2440bgeu x12, x13, 2441 42# CHECK-ASM-AND-OBJ: lb a4, 25(a5)43lb x14, 25(x15)44# CHECK-ASM-AND-OBJ: lh zero, 26(ra)45lh zero, 26(ra)46# CHECK-ASM-AND-OBJ: lw sp, 28(gp)47lw sp, 28(gp)48# CHECK-ASM-AND-OBJ: lbu tp, 29(t0)49lbu tp, 29(t0)50# CHECK-ASM-AND-OBJ: lhu t1, 30(t2)51lhu t1, 30(t2)52# CHECK-ASM-AND-OBJ: sb s0, 31(s1)53sb s0, 31(s1)54# CHECK-ASM-AND-OBJ: sh a0, 32(a1)55sh a0, 32(a1)56# CHECK-ASM-AND-OBJ: sw a2, 36(a3)57sw a2, 36(a3)58 59# CHECK-ASM-AND-OBJ: addi a4, a5, 3760addi a4, a5, 3761# CHECK-ASM-AND-OBJ: slti a0, a2, -2062slti a0, a2, -2063# CHECK-ASM-AND-OBJ: xori tp, t1, -9964xori tp, t1, -9965# CHECK-ASM-AND-OBJ: ori a0, a1, -204866ori a0, a1, -204867# CHECK-ASM-AND-OBJ: andi ra, sp, 204768andi ra, sp, 204769# CHECK-ASM-AND-OBJ: slli t1, t1, 3170slli t1, t1, 3171# CHECK-ASM-AND-OBJ: srli a0, a4, 072srli a0, a4, 073# CHECK-ASM-AND-OBJ: srai a1, sp, 1574srai a1, sp, 1575# CHECK-ASM-AND-OBJ: slli t0, t1, 1376slli t0, t1, 1377 78# CHECK-ASM-AND-OBJ: add ra, zero, zero79add ra, zero, zero80# CHECK-ASM-AND-OBJ: sub t0, t2, t181sub t0, t2, t182# CHECK-ASM-AND-OBJ: sll a5, a4, a383sll a5, a4, a384# CHECK-ASM-AND-OBJ: slt s0, s0, s085slt s0, s0, s086# CHECK-ASM-AND-OBJ: sltu gp, a0, a187sltu gp, a0, a188# CHECK-ASM-AND-OBJ: xor s1, s0, s189xor s1, s0, s190# CHECK-ASM-AND-OBJ: srl a0, s0, t091srl a0, s0, t092# CHECK-ASM-AND-OBJ: sra t0, a3, zero93sra t0, a3, zero94# CHECK-ASM-AND-OBJ: or a5, t1, ra95or a5, t1, ra96# CHECK-ASM-AND-OBJ: and a0, s1, a397and a0, s1, a398 99# CHECK-ASM-AND-OBJ: fence iorw, iorw100fence iorw, iorw101# CHECK-ASM-AND-OBJ: fence.tso102fence.tso103# CHECK-ASM-AND-OBJ: fence.i104fence.i105 106# CHECK-ASM-AND-OBJ: ecall107ecall108# CHECK-ASM-AND-OBJ: ebreak109ebreak110# CHECK-ASM-AND-OBJ: unimp111unimp112 113# CHECK-ASM-AND-OBJ: csrrw t0, 4095, t1114csrrw t0, 0xfff, t1115# CHECK-ASM-AND-OBJ: csrrs s0, cycle, zero116csrrs s0, 0xc00, x0117# CHECK-ASM-AND-OBJ: csrrs s0, fflags, a5118csrrs s0, 0x001, a5119# CHECK-ASM-AND-OBJ: csrrc sp, 0, ra120csrrc sp, 0x000, ra121# CHECK-ASM-AND-OBJ: csrrwi a5, 0, 0122csrrwi a5, 0x000, 0123# CHECK-ASM-AND-OBJ: csrrsi t2, 4095, 31124csrrsi t2, 0xfff, 31125# CHECK-ASM-AND-OBJ: csrrci t1, sscratch, 5126csrrci t1, 0x140, 5127