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1# RUN: llvm-mc -triple=riscv64 -show-encoding --mattr=+zve32f %s --M no-aliases \2# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST3# RUN: not llvm-mc -triple=riscv64 -show-encoding %s 2>&1 \4# RUN: | FileCheck %s --check-prefix=CHECK-ERROR5# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+zve32f %s \6# RUN: | llvm-objdump -d --mattr=+zve32f -M no-aliases - \7# RUN: | FileCheck %s --check-prefix=CHECK-INST8# RUN: llvm-mc -triple=riscv64 -filetype=obj --mattr=+zve32f %s \9# RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN10 11vfsqrt.v v8, v4, v0.t12# CHECK-INST: vfsqrt.v v8, v4, v0.t13# CHECK-ENCODING: [0x57,0x14,0x40,0x4c]14# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}15# CHECK-UNKNOWN: 4c401457 <unknown>16 17vfsqrt.v v8, v418# CHECK-INST: vfsqrt.v v8, v419# CHECK-ENCODING: [0x57,0x14,0x40,0x4e]20# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}21# CHECK-UNKNOWN: 4e401457 <unknown>22 23vfrsqrt7.v v8, v4, v0.t24# CHECK-INST: vfrsqrt7.v v8, v4, v0.t25# CHECK-ENCODING: [0x57,0x14,0x42,0x4c]26# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}27# CHECK-UNKNOWN: 4c421457 <unknown>28 29vfrsqrt7.v v8, v430# CHECK-INST: vfrsqrt7.v v8, v431# CHECK-ENCODING: [0x57,0x14,0x42,0x4e]32# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}33# CHECK-UNKNOWN: 4e421457 <unknown>34 35vfrec7.v v8, v4, v0.t36# CHECK-INST: vfrec7.v v8, v4, v0.t37# CHECK-ENCODING: [0x57,0x94,0x42,0x4c]38# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}39# CHECK-UNKNOWN: 4c429457 <unknown>40 41vfrec7.v v8, v442# CHECK-INST: vfrec7.v v8, v443# CHECK-ENCODING: [0x57,0x94,0x42,0x4e]44# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}45# CHECK-UNKNOWN: 4e429457 <unknown>46 47vfclass.v v8, v4, v0.t48# CHECK-INST: vfclass.v v8, v4, v0.t49# CHECK-ENCODING: [0x57,0x14,0x48,0x4c]50# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}51# CHECK-UNKNOWN: 4c481457 <unknown>52 53vfclass.v v8, v454# CHECK-INST: vfclass.v v8, v455# CHECK-ENCODING: [0x57,0x14,0x48,0x4e]56# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}57# CHECK-UNKNOWN: 4e481457 <unknown>58 59vfmerge.vfm v8, v4, fa0, v060# CHECK-INST: vfmerge.vfm v8, v4, fa0, v061# CHECK-ENCODING: [0x57,0x54,0x45,0x5c]62# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}63# CHECK-UNKNOWN: 5c455457 <unknown>64 65vfslide1up.vf v8, v4, fa0, v0.t66# CHECK-INST: vfslide1up.vf v8, v4, fa0, v0.t67# CHECK-ENCODING: [0x57,0x54,0x45,0x38]68# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}69# CHECK-UNKNOWN: 38455457 <unknown>70 71vfslide1up.vf v8, v4, fa072# CHECK-INST: vfslide1up.vf v8, v4, fa073# CHECK-ENCODING: [0x57,0x54,0x45,0x3a]74# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}75# CHECK-UNKNOWN: 3a455457 <unknown>76 77vfslide1down.vf v8, v4, fa0, v0.t78# CHECK-INST: vfslide1down.vf v8, v4, fa0, v0.t79# CHECK-ENCODING: [0x57,0x54,0x45,0x3c]80# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}81# CHECK-UNKNOWN: 3c455457 <unknown>82 83vfslide1down.vf v8, v4, fa084# CHECK-INST: vfslide1down.vf v8, v4, fa085# CHECK-ENCODING: [0x57,0x54,0x45,0x3e]86# CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}}87# CHECK-UNKNOWN: 3e455457 <unknown>88