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1# RUN: llvm-mc -triple riscv32 -mattr=+experimental-xqcili %s \2# RUN: | FileCheck -check-prefix=ASM %s3# RUN: llvm-mc -triple riscv32 -mattr=+experimental-xqcili %s \4# RUN: -filetype=obj -o - \5# RUN: | llvm-objdump -dr --mattr=+experimental-xqcili - \6# RUN: | FileCheck -check-prefix=OBJ %s7 8## This test checks that we emit the right relocations for Xqcili9## immediates. These always require a relocation pair, unless the10## target is absolute.11 12# This is required so that the conditional branches requiring relocations13# are not converted into inverted branches with long jumps by the assembler.14.option exact15 16.set abs_symbol, 0x017 18# ASM-LABEL: this_section:19# OBJ-LABEL: <this_section>:20this_section:21 22# ASM: qc.li a0, %qc.abs20(undef)23# OBJ: qc.li a0, 0x024# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}25# OBJ-NEXT: R_RISCV_CUSTOM192 undef{{$}}26qc.li a0, %qc.abs20(undef)27 28# ASM: qc.e.li s0, undef29# OBJ-NEXT: qc.e.li s0, 0x030# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}31# OBJ-NEXT: R_RISCV_CUSTOM194 undef{{$}}32qc.e.li s0, undef33 34 35# ASM: qc.li a1, %qc.abs20(0)36# OBJ-NEXT: qc.li a1, 0x037qc.li a1, %qc.abs20(abs_symbol)38 39# ASM: qc.e.li s1, 040# OBJ-NEXT: qc.e.li s1, 0x041qc.e.li s1, abs_symbol42 43 44# ASM: qc.li a2, %qc.abs20(same_section)45# OBJ-NEXT: qc.li a2, 0x046# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}47# OBJ-NEXT: R_RISCV_CUSTOM192 same_section{{$}}48qc.li a2, %qc.abs20(same_section)49 50# ASM: qc.e.li s2, same_section51# OBJ-NEXT: qc.e.li s2, 0x052# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}53# OBJ-NEXT: R_RISCV_CUSTOM194 same_section{{$}}54qc.e.li s2, same_section55 56# ASM: qc.li a3, %qc.abs20(other_section)57# OBJ-NEXT: qc.li a3, 0x058# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}59# OBJ-NEXT: R_RISCV_CUSTOM192 other_section{{$}}60qc.li a3, %qc.abs20(other_section)61 62# ASM: qc.e.li s3, other_section63# OBJ-NEXT: qc.e.li s3, 0x064# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}65# OBJ-NEXT: R_RISCV_CUSTOM194 other_section{{$}}66qc.e.li s3, other_section67 68# ASM-LABEL: same_section:69# OBJ-LABEL: <same_section>:70same_section:71 nop72 73.option relax74 75# ASM: qc.li a1, %qc.abs20(0)76# OBJ: qc.li a1, 0x077# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}78# OBJ-NEXT: R_RISCV_CUSTOM192 *ABS*{{$}}79# OBJ-NEXT: R_RISCV_RELAX80qc.li a1, %qc.abs20(abs_symbol)81 82# ASM: qc.e.li s1, 083# OBJ-NEXT: qc.e.li s1, 0x084qc.e.li s1, abs_symbol85 86# ASM: qc.li a1, %qc.abs20(undef)87# OBJ-NEXT: qc.li a1, 0x088# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}89# OBJ-NEXT: R_RISCV_CUSTOM192 undef{{$}}90# OBJ-NEXT: R_RISCV_RELAX91qc.li a1, %qc.abs20(undef)92 93# ASM: qc.e.li s1, undef94# OBJ-NEXT: qc.e.li s1, 0x095# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}96# OBJ-NEXT: R_RISCV_CUSTOM194 undef{{$}}97# OBJ-NEXT: R_RISCV_RELAX98qc.e.li s1, undef99 100## Enable compression/relaxation to check how symbols are handled.101.option noexact102 103# ASM: qc.li a1, %qc.abs20(undef)104# OBJ-NEXT: qc.li a1, 0x0105# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}106# OBJ-NEXT: R_RISCV_CUSTOM192 undef{{$}}107# OBJ-NEXT: R_RISCV_RELAX108qc.li a1, %qc.abs20(undef)109 110# ASM: qc.e.li a2, undef111# OBJ-NEXT: qc.e.li a2, 0x0112# OBJ-NEXT: R_RISCV_VENDOR QUALCOMM{{$}}113# OBJ-NEXT: R_RISCV_CUSTOM194 undef{{$}}114# OBJ-NEXT: R_RISCV_RELAX115qc.e.li a2, undef116 117.section .text.other, "ax", @progbits118 119# ASM-LABEL: other_section:120# OBJ-LABEL: <other_section>:121other_section:122 nop123