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1# RUN: llvm-mc -triple s390x-linux-gnu -filetype=obj %s | \2# RUN: llvm-objdump --mcpu=zEC12 -d - | FileCheck %s3 4# Test the .insn directive which provides a way of encoding an instruction5# directly. It takes a format, encoding, and operands based on the format.6 7#CHECK: 01 01 pr8 .insn e,0x01019 10#CHECK: a7 18 12 34 lhi %r1, 466011 .insn ri,0xa7080000,%r1,0x123412 13# GAS considers this instruction's immediate operand to be PC relative.14#CHECK: ec 12 00 06 00 76 crj %r1, %r2, 0, 0x1215 .insn rie,0xec0000000076,%r1,%r2,1216#CHECK: ec 12 00 03 00 64 cgrj %r1, %r2, 0, 0x1217 .insn rie,0xec0000000064,%r1,%r2,label.rie18#CHECK: <label.rie>:19label.rie:20 21# GAS considers this instruction's immediate operand to be PC relative.22#CHECK: c6 1d 00 00 00 06 crl %r1, 0x1e23 .insn ril,0xc60d00000000,%r1,1224#CHECK: c6 18 00 00 00 03 cgrl %r1, 0x1e25 .insn ril,0xc60800000000,%r1,label.ril26#CHECK: <label.ril>:27label.ril:28 29#CHECK: c2 2b 80 00 00 00 alfi %r2, 214748364830 .insn rilu,0xc20b00000000,%r2,0x8000000031 32#CHECK: ec 1c f0 a0 34 fc cgible %r1, 52, 160(%r15)33 .insn ris,0xec00000000fc,%r1,0x34,0xc,160(%r15)34 35# Test using an integer in place of a register.36#CHECK: 18 23 lr %r2, %r337 .insn rr,0x1800,2,338 39#CHECK: b9 14 00 45 lgfr %r4, %r540 .insn rre,0xb9140000,%r4,%r541 42# Test FP and GR registers in a single directive.43#CHECK: b3 c1 00 fe ldgr %f15, %r1444 .insn rre,0xb3c10000,%f15,%r1445 46# Test using an integer in place of a register.47#CHECK: b3 44 34 12 ledbra %f1, 3, %f2, 448 .insn rrf,0xb3440000,%f1,2,%f3,449 50#CHECK: ec 34 f0 b4 a0 e4 cgrbhe %r3, %r4, 180(%r15)51 .insn rrs,0xec00000000e4,%r3,%r4,0xa,180(%r15)52 53#CHECK: ba 01 f0 a0 cs %r0, %r1, 160(%r15)54 .insn rs,0xba000000,%r0,%r1,160(%r15)55 56# GAS considers this instruction's immediate operand to be PC relative.57#CHECK: 84 13 00 04 brxh %r1, %r3, 0x4a58 .insn rsi,0x84000000,%r1,%r3,859#CHECK: 84 13 00 02 brxh %r1, %r3, 0x4a60 .insn rsi,0x84000000,%r1,%r3,label.rsi61#CHECK: <label.rsi>:62label.rsi:63 64# RSE formats are short displacement versions of the RSY formats.65#CHECK: eb 12 f0 a0 00 f8 laa %r1, %r2, 160(%r15)66 .insn rse,0xeb00000000f8,%r1,%r2,160(%r15)67 68#CHECK: eb 12 f3 45 12 30 csg %r1, %r2, 74565(%r15)69 .insn rsy,0xeb0000000030,%r1,%r2,74565(%r15)70 71#CHECK: 59 13 f0 a0 c %r1, 160(%r3,%r15)72 .insn rx,0x59000000,%r1,160(%r3,%r15)73 74#CHECK: ed 13 f0 a0 00 19 cdb %f1, 160(%r3,%r15)75 .insn rxe,0xed0000000019,%f1,160(%r3,%r15)76 77#CHECK: ed 23 f0 a0 10 1e madb %f1, %f2, 160(%r3,%r15)78 .insn rxf,0xed000000001e,%f1,%f2,160(%r3,%r15)79 80#CHECK: ed 12 f1 23 90 65 ldy %f1, -458461(%r2,%r15)81 .insn rxy,0xed0000000065,%f1,-458461(%r2,%r15)82 83#CHECK: b2 fc f0 a0 tabort 160(%r15)84 .insn s,0xb2fc0000,160(%r15)85 86#CHECK: 91 34 f0 a0 tm 160(%r15), 5287 .insn si,0x91000000,160(%r15),5288 89#CHECK: eb f0 fc de ab 51 tmy -344866(%r15), 24090 .insn siy,0xeb0000000051,-344866(%r15),24091 92#CHECK: e5 60 f0 a0 12 34 tbegin 160(%r15), 466093 .insn sil,0xe56000000000,160(%r15),0x123494 95#CHECK: d9 13 f1 23 e4 56 mvck 291(%r1,%r15), 1110(%r14), %r396 .insn ss,0xd90000000000,291(%r1,%r15),1110(%r14),%r397 98#CHECK: e5 02 10 a0 21 23 strag 160(%r1), 291(%r2)99 .insn sse,0xe50200000000,160(%r1),291(%r2)100 101#CHECK: c8 31 f0 a0 e2 34 ectg 160(%r15), 564(%r14), %r3102 .insn ssf,0xc80100000000,160(%r15),564(%r14),%r3103