63 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 32# RUN: llc -mtriple=riscv64 -o - -global-isel -run-pass=none -verify-machineinstrs %s | FileCheck %s3# REQUIRES: riscv64-registered-target4 5---6name: test_copy_physical_to_virtual_nxv1s87legalized: true8regBankSelected: false9selected: false10tracksRegLiveness: true11registers:12 - { id: 0, class: _, preferred-register: '' }13liveins:14body: |15 bb.0:16 liveins: $v817 18 ; CHECK-LABEL: name: test_copy_physical_to_virtual_nxv1s819 ; CHECK: liveins: $v820 ; CHECK-NEXT: {{ $}}21 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 1 x s8>) = COPY $v822 %0:_(<vscale x 1 x s8>) = COPY $v823...24 25---26name: test_copy_physical_to_virtual_nxv16s827legalized: true28tracksRegLiveness: true29body: |30 bb.1.entry:31 liveins: $v832 ; CHECK-LABEL: name: test_copy_physical_to_virtual_nxv16s833 ; CHECK: liveins: $v834 ; CHECK-NEXT: {{ $}}35 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v836 %0:_(<vscale x 16 x s8>) = COPY $v837 38...39 40---41name: test_copy_virtual_to_physical42legalized: true43regBankSelected: false44selected: false45tracksRegLiveness: true46registers:47 - { id: 0, class: _, preferred-register: '' }48liveins:49body: |50 bb.0:51 liveins: $v852 53 ; CHECK-LABEL: name: test_copy_virtual_to_physical54 ; CHECK: liveins: $v855 ; CHECK-NEXT: {{ $}}56 ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(<vscale x 1 x s8>) = IMPLICIT_DEF57 ; CHECK-NEXT: $v8 = COPY [[DEF]](<vscale x 1 x s8>)58 ; CHECK-NEXT: PseudoRET implicit $v859 %0:_(<vscale x 1 x s8>) = IMPLICIT_DEF60 $v8 = COPY %0(<vscale x 1 x s8>)61 PseudoRET implicit $v862...63