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1# REQUIRES: aarch64-registered-target2# RUN: not --crash llc -verify-machineinstrs -mtriple aarch64 -run-pass none -o /dev/null %s 2>&1 | FileCheck %s3 4name: test5body: |6 bb.0:7 liveins: $x0, $w08 %0:_(s64) = COPY $x09 %1:_(<4 x s16>) = COPY $x010 %2:_(s32) = COPY $w011 12 ; CHECK: *** Bad machine code: G_ASSERT_SEXT expects an immediate operand #2 ***13 ; CHECK: instruction: %assert_sext_1:_(s64) = G_ASSERT_SEXT14 %assert_sext_1:_(s64) = G_ASSERT_SEXT %0, %015 16 ; CHECK: *** Bad machine code: G_ASSERT_SEXT expects an immediate operand #2 ***17 ; CHECK: instruction: %assert_sext_2:_(s64) = G_ASSERT_SEXT18 %assert_sext_2:_(s64) = G_ASSERT_SEXT %0, i8 819 20 ; CHECK: *** Bad machine code: Type mismatch in generic instruction ***21 ; CHECK: instruction: %assert_sext_3:_(<2 x s32>) = G_ASSERT_SEXT22 %assert_sext_3:_(<2 x s32>) = G_ASSERT_SEXT %0, 823 24 ; CHECK: *** Bad machine code: Type mismatch in generic instruction ***25 ; CHECK: instruction: %assert_sext_4:_(<2 x s32>) = G_ASSERT_SEXT26 %assert_sext_4:_(<2 x s32>) = G_ASSERT_SEXT %1, 827 28 ; CHECK: *** Bad machine code: G_ASSERT_SEXT size must be >= 1 ***29 ; CHECK: instruction: %assert_sext_5:_(s64) = G_ASSERT_SEXT30 %assert_sext_5:_(s64) = G_ASSERT_SEXT %0, 031 32 ; CHECK: *** Bad machine code: G_ASSERT_SEXT size must be less than source bit width ***33 ; CHECK: instruction: %assert_sext_6:_(s64) = G_ASSERT_SEXT34 %assert_sext_6:_(s64) = G_ASSERT_SEXT %0, 12835 36 ; CHECK: *** Bad machine code: Type mismatch in generic instruction ***37 ; CHECK: instruction: %assert_sext_7:_(s64) = G_ASSERT_SEXT %2:_, 838 %assert_sext_7:_(s64) = G_ASSERT_SEXT %2, 839 40 ; CHECK: *** Bad machine code: Generic instruction cannot have physical register ***41 ; CHECK: instruction: %assert_sext_8:_(s64) = G_ASSERT_SEXT $x0, 842 %assert_sext_8:_(s64) = G_ASSERT_SEXT $x0, 843