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1; REQUIRES: asserts2; RUN: opt < %s -passes=div-rem-pairs -debug-counter=div-rem-pairs-transform=1 \3; RUN: -S -mtriple=x86_64-unknown-unknown | FileCheck %s4;; Test that, with debug counters on, we only skip the first div-rem-pairs opportunity, optimize one after it,5;; and then ignore all the others. There is 1 optimization opportunity in f1, 2 in f2, and another 1 in f3,6;; only the first one in f2 will be performed.7 8define i64 @f1(i64 %a, i64 %b) {9; CHECK-LABEL: @f1(10; CHECK-NEXT: entry:11; CHECK-NEXT: [[REM:%.*]] = urem i64 %a, %b12; CHECK-NEXT: [[CMP:%.*]] = icmp eq i64 [[REM]], 4213; CHECK-NEXT: br i1 [[CMP]], label %if, label %end14; CHECK: if:15; CHECK-NEXT: [[DIV:%.*]] = udiv i64 %a, %b16; CHECK-NEXT: br label %end17; CHECK: end:18; CHECK-NEXT: [[RET:%.*]] = phi i64 [ [[DIV]], %if ], [ 3, %entry ]19; CHECK-NEXT: ret i64 [[RET]]20;21entry:22 %rem = urem i64 %a, %b23 %cmp = icmp eq i64 %rem, 4224 br i1 %cmp, label %if, label %end25 26if:27 %div = udiv i64 %a, %b28 br label %end29 30end:31 %ret = phi i64 [ %div, %if ], [ 3, %entry ]32 ret i64 %ret33}34 35define i16 @f2(i16 %a, i16 %b) {36; CHECK-LABEL: @f2(37; CHECK-NEXT: entry:38; CHECK-NEXT: [[DIV1:%.*]] = sdiv i16 %a, %b39; CHECK-NEXT: [[REM1:%.*]] = srem i16 %a, %b40; CHECK-NEXT: [[DIV2:%.*]] = udiv i16 %a, %b41; CHECK-NEXT: [[CMP:%.*]] = icmp eq i16 [[DIV1]], 4242; CHECK-NEXT: br i1 [[CMP]], label %if, label %end43; CHECK: if:44; CHECK-NEXT: [[REM2:%.*]] = urem i16 %a, %b45; CHECK-NEXT: br label %end46; CHECK: end:47; CHECK-NEXT: [[RET:%.*]] = phi i16 [ [[REM1]], %if ], [ 3, %entry ]48; CHECK-NEXT: ret i16 [[RET]]49;50entry:51 %div1 = sdiv i16 %a, %b52 %div2 = udiv i16 %a, %b53 %cmp = icmp eq i16 %div1, 4254 br i1 %cmp, label %if, label %end55 56if:57 %rem1 = srem i16 %a, %b58 %rem2 = urem i16 %a, %b59 br label %end60 61end:62 %ret = phi i16 [ %rem1, %if ], [ 3, %entry ]63 ret i16 %ret64}65 66define i32 @f3(i32 %a, i32 %b) {67; CHECK-LABEL: @f3(68; CHECK-NEXT: entry:69; CHECK-NEXT: [[REM:%.*]] = srem i32 %a, %b70; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[REM]], 4271; CHECK-NEXT: br i1 [[CMP]], label %if, label %end72; CHECK: if:73; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 %a, %b74; CHECK-NEXT: br label %end75; CHECK: end:76; CHECK-NEXT: [[RET:%.*]] = phi i32 [ [[DIV]], %if ], [ 3, %entry ]77; CHECK-NEXT: ret i32 [[RET]]78;79entry:80 %rem = srem i32 %a, %b81 %cmp = icmp eq i32 %rem, 4282 br i1 %cmp, label %if, label %end83 84if:85 %div = sdiv i32 %a, %b86 br label %end87 88end:89 %ret = phi i32 [ %div, %if ], [ 3, %entry ]90 ret i32 %ret91}92