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1// RUN: llvm-tblgen -gen-global-isel -warn-on-skipped-patterns \2// RUN: -I %p/../../../include -I %p/../Common %s 2> %t | FileCheck %s3// RUN: FileCheck -DFILE=%s -check-prefix=ERR %s < %t4 5include "llvm/Target/Target.td"6include "GlobalISelEmitterCommon.td"7 8def cc_out : OptionalDefOperand<i32, (ops GPR8), (ops (i8 zero_reg))>;9def s_cc_out : OptionalDefOperand<i32, (ops GPR8, FPR32), (ops (i8 B0), F0)>;10 11// CHECK-LABEL: // (add:{ *:[i32] } i32:{ *:[i32] }:$rs1, i32:{ *:[i32] }:$rs2) => (tst2:{ *:[i32] } i32:{ *:[i32] }:$rs1, i32:{ *:[i32] }:$rs2)12// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::tst2),13// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[rd]14// CHECK-NEXT: GIR_AddRegister, /*InsnID*/0, GIMT_Encode2(MyTarget::B0), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define | RegState::Dead),15// CHECK-NEXT: GIR_AddRegister, /*InsnID*/0, GIMT_Encode2(MyTarget::F0), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define | RegState::Dead),16// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/1, // rs117// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/2, // rs218// CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,19// CHECK-NEXT: // GIR_Coverage, 1,20// CHECK-NEXT: GIR_EraseRootFromParent_Done,21 22// CHECK-LABEL: // (imm:{ *:[i32] }):$imm => (tst1:{ *:[i32] } (imm:{ *:[i32] }):$imm)23// CHECK-NEXT: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(MyTarget::tst1),24// CHECK-NEXT: GIR_RootToRootCopy, /*OpIdx*/0, // DstI[rd]25// CHECK-NEXT: GIR_AddRegister, /*InsnID*/0, GIMT_Encode2(MyTarget::NoRegister), /*AddRegisterRegFlags*/GIMT_Encode2(RegState::Define | RegState::Dead),26// CHECK-NEXT: GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // imm27// CHECK-NEXT: GIR_RootConstrainSelectedInstOperands,28// CHECK-NEXT: // GIR_Coverage, 0,29// CHECK-NEXT: GIR_EraseRootFromParent_Done,30 31def tst1 : I<(outs GPR32:$rd, cc_out:$s), (ins i32imm:$imm),32 [(set GPR32:$rd, imm:$imm)]>;33 34def tst2 : I<(outs GPR32:$rd, s_cc_out:$s), (ins GPR32:$rs1, GPR32:$rs2),35 [(set GPR32:$rd, (add i32:$rs1, i32:$rs2))]>;36 37// TODO: There should be more tests, but any attempt to write something38// more complex results in tablegen crashing somewhere in39// TreePatternNode::UpdateNodeType.40 41 42def not_leaf : OptionalDefOperand<i32, (ops GPR8), (ops (i8 imm))>;43def not_rec : OptionalDefOperand<i32, (ops GPR8), (ops (i8 0))>;44def not_reg : OptionalDefOperand<i32, (ops GPR8), (ops GPR8)>;45 46// ERR: [[#@LINE+1]]:5: warning: Skipped pattern: optional def is not a leaf47def tst_not_leaf : I<(outs GPR32:$rd, not_leaf:$s), (ins i32imm:$imm),48 [(set GPR32:$rd, imm:$imm)]>;49 50// ERR: [[#@LINE+1]]:5: warning: Skipped pattern: optional def is not a record51def tst_not_rec : I<(outs GPR32:$rd, not_rec:$s), (ins i32imm:$imm),52 [(set GPR32:$rd, imm:$imm)]>;53 54// ERR: [[#@LINE+1]]:5: warning: Skipped pattern: optional def is not a register55def tst_not_reg : I<(outs GPR32:$rd, not_reg:$s), (ins i32imm:$imm),56 [(set GPR32:$rd, imm:$imm)]>;57