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1// RUN: llvm-tblgen -gen-instr-info -I %p/../../include %s | FileCheck %s2 3// Check that getOperandType has the expected info in it.4 5include "llvm/Target/Target.td"6 7def archInstrInfo : InstrInfo { }8 9def X86 : Target {10 let InstructionSet = archInstrInfo;11}12 13def Reg : Register<"reg">;14def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;15 16def OpA : Operand<i32>;17def OpB : Operand<i32>;18 19def RegOp : RegisterOperand<RegClass>;20 21defm : RemapAllTargetPseudoPointerOperands<RegClass>;22 23def InstA : Instruction {24 let Size = 1;25 let OutOperandList = (outs OpA:$a);26 let InOperandList = (ins OpB:$b, i32imm:$c);27 field bits<8> Inst;28 field bits<8> SoftFail = 0;29 let Namespace = "X86";30}31 32def InstB : Instruction {33 let Size = 1;34 let OutOperandList = (outs i32imm:$d);35 let InOperandList = (ins unknown:$x);36 field bits<8> Inst;37 field bits<8> SoftFail = 0;38 let Namespace = "X86";39}40 41def InstC : Instruction {42 let Size = 1;43 let OutOperandList = (outs RegClass:$d);44 let InOperandList = (ins RegOp:$x);45 field bits<8> Inst;46 field bits<8> SoftFail = 0;47 let Namespace = "X86";48}49 50// CHECK: #ifdef GET_INSTRINFO_OPERAND_TYPE51// CHECK: static constexpr uint{{.*}}_t Offsets[] = {52// CHECK: static constexpr {{.*}} OpcodeOperandTypes[] = {53// CHECK: /* InstA */54// CHECK-NEXT: OpA, OpB, i32imm,55// CHECK-NEXT: /* InstB */56// CHECK-NEXT: i32imm, -1,57// CHECK-NEXT: /* InstC */58// CHECK-NEXT: RegClass, RegOp,59// CHECK: #endif // GET_INSTRINFO_OPERAND_TYPE60