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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt < %s -passes=aggressive-instcombine -mtriple thumbv8.1m.main-none-eabi -S | FileCheck %s --check-prefixes=CHECK,CHECK-BASE3; RUN: opt < %s -passes=aggressive-instcombine -mtriple thumbv8.1m.main-none-eabi -mattr=+mve.fp -S | FileCheck %s --check-prefixes=CHECK,CHECK-MVEFP4; RUN: opt < %s -passes=aggressive-instcombine -mtriple thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -S | FileCheck %s --check-prefixes=CHECK,CHECK-FP645 6define i64 @f32_i32(float %in) {7; CHECK-BASE-LABEL: @f32_i32(8; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i649; CHECK-BASE-NEXT: [[MIN:%.*]] = call i64 @llvm.smin.i64(i64 [[CONV]], i64 2147483647)10; CHECK-BASE-NEXT: [[MAX:%.*]] = call i64 @llvm.smax.i64(i64 [[MIN]], i64 -2147483648)11; CHECK-BASE-NEXT: ret i64 [[MAX]]12;13; CHECK-MVEFP-LABEL: @f32_i32(14; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[IN:%.*]])15; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i6416; CHECK-MVEFP-NEXT: ret i64 [[TMP2]]17;18; CHECK-FP64-LABEL: @f32_i32(19; CHECK-FP64-NEXT: [[TMP1:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[IN:%.*]])20; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i6421; CHECK-FP64-NEXT: ret i64 [[TMP2]]22;23 %conv = fptosi float %in to i6424 %min = call i64 @llvm.smin.i64(i64 %conv, i64 2147483647)25 %max = call i64 @llvm.smax.i64(i64 %min, i64 -2147483648)26 ret i64 %max27}28 29define i64 @f32_i31(float %in) {30; CHECK-BASE-LABEL: @f32_i31(31; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i6432; CHECK-BASE-NEXT: [[MIN:%.*]] = call i64 @llvm.smin.i64(i64 [[CONV]], i64 1073741823)33; CHECK-BASE-NEXT: [[MAX:%.*]] = call i64 @llvm.smax.i64(i64 [[MIN]], i64 -1073741824)34; CHECK-BASE-NEXT: ret i64 [[MAX]]35;36; CHECK-MVEFP-LABEL: @f32_i31(37; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call i31 @llvm.fptosi.sat.i31.f32(float [[IN:%.*]])38; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext i31 [[TMP1]] to i6439; CHECK-MVEFP-NEXT: ret i64 [[TMP2]]40;41; CHECK-FP64-LABEL: @f32_i31(42; CHECK-FP64-NEXT: [[TMP1:%.*]] = call i31 @llvm.fptosi.sat.i31.f32(float [[IN:%.*]])43; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext i31 [[TMP1]] to i6444; CHECK-FP64-NEXT: ret i64 [[TMP2]]45;46 %conv = fptosi float %in to i6447 %min = call i64 @llvm.smin.i64(i64 %conv, i64 1073741823)48 %max = call i64 @llvm.smax.i64(i64 %min, i64 -1073741824)49 ret i64 %max50}51 52define i32 @f32_i16(float %in) {53; CHECK-LABEL: @f32_i16(54; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i3255; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[CONV]], i32 32767)56; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[MIN]], i32 -32768)57; CHECK-NEXT: ret i32 [[MAX]]58;59 %conv = fptosi float %in to i3260 %min = call i32 @llvm.smin.i32(i32 %conv, i32 32767)61 %max = call i32 @llvm.smax.i32(i32 %min, i32 -32768)62 ret i32 %max63}64 65define i32 @f32_i8(float %in) {66; CHECK-LABEL: @f32_i8(67; CHECK-NEXT: [[CONV:%.*]] = fptosi float [[IN:%.*]] to i3268; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[CONV]], i32 127)69; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[MIN]], i32 -128)70; CHECK-NEXT: ret i32 [[MAX]]71;72 %conv = fptosi float %in to i3273 %min = call i32 @llvm.smin.i32(i32 %conv, i32 127)74 %max = call i32 @llvm.smax.i32(i32 %min, i32 -128)75 ret i32 %max76}77 78define i64 @f64_i32(double %in) {79; CHECK-BASE-LABEL: @f64_i32(80; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i6481; CHECK-BASE-NEXT: [[MIN:%.*]] = call i64 @llvm.smin.i64(i64 [[CONV]], i64 2147483647)82; CHECK-BASE-NEXT: [[MAX:%.*]] = call i64 @llvm.smax.i64(i64 [[MIN]], i64 -2147483648)83; CHECK-BASE-NEXT: ret i64 [[MAX]]84;85; CHECK-MVEFP-LABEL: @f64_i32(86; CHECK-MVEFP-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i6487; CHECK-MVEFP-NEXT: [[MIN:%.*]] = call i64 @llvm.smin.i64(i64 [[CONV]], i64 2147483647)88; CHECK-MVEFP-NEXT: [[MAX:%.*]] = call i64 @llvm.smax.i64(i64 [[MIN]], i64 -2147483648)89; CHECK-MVEFP-NEXT: ret i64 [[MAX]]90;91; CHECK-FP64-LABEL: @f64_i32(92; CHECK-FP64-NEXT: [[TMP1:%.*]] = call i32 @llvm.fptosi.sat.i32.f64(double [[IN:%.*]])93; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i6494; CHECK-FP64-NEXT: ret i64 [[TMP2]]95;96 %conv = fptosi double %in to i6497 %min = call i64 @llvm.smin.i64(i64 %conv, i64 2147483647)98 %max = call i64 @llvm.smax.i64(i64 %min, i64 -2147483648)99 ret i64 %max100}101 102define i64 @f64_i31(double %in) {103; CHECK-LABEL: @f64_i31(104; CHECK-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i64105; CHECK-NEXT: [[MIN:%.*]] = call i64 @llvm.smin.i64(i64 [[CONV]], i64 1073741823)106; CHECK-NEXT: [[MAX:%.*]] = call i64 @llvm.smax.i64(i64 [[MIN]], i64 -1073741824)107; CHECK-NEXT: ret i64 [[MAX]]108;109 %conv = fptosi double %in to i64110 %min = call i64 @llvm.smin.i64(i64 %conv, i64 1073741823)111 %max = call i64 @llvm.smax.i64(i64 %min, i64 -1073741824)112 ret i64 %max113}114 115define i32 @f64_i16(double %in) {116; CHECK-LABEL: @f64_i16(117; CHECK-NEXT: [[CONV:%.*]] = fptosi double [[IN:%.*]] to i32118; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[CONV]], i32 32767)119; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[MIN]], i32 -32768)120; CHECK-NEXT: ret i32 [[MAX]]121;122 %conv = fptosi double %in to i32123 %min = call i32 @llvm.smin.i32(i32 %conv, i32 32767)124 %max = call i32 @llvm.smax.i32(i32 %min, i32 -32768)125 ret i32 %max126}127 128define i64 @f16_i32(half %in) {129; CHECK-BASE-LABEL: @f16_i32(130; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i64131; CHECK-BASE-NEXT: [[MIN:%.*]] = call i64 @llvm.smin.i64(i64 [[CONV]], i64 2147483647)132; CHECK-BASE-NEXT: [[MAX:%.*]] = call i64 @llvm.smax.i64(i64 [[MIN]], i64 -2147483648)133; CHECK-BASE-NEXT: ret i64 [[MAX]]134;135; CHECK-MVEFP-LABEL: @f16_i32(136; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call i32 @llvm.fptosi.sat.i32.f16(half [[IN:%.*]])137; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64138; CHECK-MVEFP-NEXT: ret i64 [[TMP2]]139;140; CHECK-FP64-LABEL: @f16_i32(141; CHECK-FP64-NEXT: [[TMP1:%.*]] = call i32 @llvm.fptosi.sat.i32.f16(half [[IN:%.*]])142; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext i32 [[TMP1]] to i64143; CHECK-FP64-NEXT: ret i64 [[TMP2]]144;145 %conv = fptosi half %in to i64146 %min = call i64 @llvm.smin.i64(i64 %conv, i64 2147483647)147 %max = call i64 @llvm.smax.i64(i64 %min, i64 -2147483648)148 ret i64 %max149}150 151define i64 @f16_i31(half %in) {152; CHECK-BASE-LABEL: @f16_i31(153; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i64154; CHECK-BASE-NEXT: [[MIN:%.*]] = call i64 @llvm.smin.i64(i64 [[CONV]], i64 1073741823)155; CHECK-BASE-NEXT: [[MAX:%.*]] = call i64 @llvm.smax.i64(i64 [[MIN]], i64 -1073741824)156; CHECK-BASE-NEXT: ret i64 [[MAX]]157;158; CHECK-MVEFP-LABEL: @f16_i31(159; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call i31 @llvm.fptosi.sat.i31.f16(half [[IN:%.*]])160; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext i31 [[TMP1]] to i64161; CHECK-MVEFP-NEXT: ret i64 [[TMP2]]162;163; CHECK-FP64-LABEL: @f16_i31(164; CHECK-FP64-NEXT: [[TMP1:%.*]] = call i31 @llvm.fptosi.sat.i31.f16(half [[IN:%.*]])165; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext i31 [[TMP1]] to i64166; CHECK-FP64-NEXT: ret i64 [[TMP2]]167;168 %conv = fptosi half %in to i64169 %min = call i64 @llvm.smin.i64(i64 %conv, i64 1073741823)170 %max = call i64 @llvm.smax.i64(i64 %min, i64 -1073741824)171 ret i64 %max172}173 174define i32 @f16_i16(half %in) {175; CHECK-LABEL: @f16_i16(176; CHECK-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i32177; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[CONV]], i32 32767)178; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[MIN]], i32 -32768)179; CHECK-NEXT: ret i32 [[MAX]]180;181 %conv = fptosi half %in to i32182 %min = call i32 @llvm.smin.i32(i32 %conv, i32 32767)183 %max = call i32 @llvm.smax.i32(i32 %min, i32 -32768)184 ret i32 %max185}186 187define i32 @f16_i8(half %in) {188; CHECK-LABEL: @f16_i8(189; CHECK-NEXT: [[CONV:%.*]] = fptosi half [[IN:%.*]] to i32190; CHECK-NEXT: [[MIN:%.*]] = call i32 @llvm.smin.i32(i32 [[CONV]], i32 127)191; CHECK-NEXT: [[MAX:%.*]] = call i32 @llvm.smax.i32(i32 [[MIN]], i32 -128)192; CHECK-NEXT: ret i32 [[MAX]]193;194 %conv = fptosi half %in to i32195 %min = call i32 @llvm.smin.i32(i32 %conv, i32 127)196 %max = call i32 @llvm.smax.i32(i32 %min, i32 -128)197 ret i32 %max198}199 200define <2 x i64> @v2f32_i32(<2 x float> %in) {201; CHECK-BASE-LABEL: @v2f32_i32(202; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi <2 x float> [[IN:%.*]] to <2 x i64>203; CHECK-BASE-NEXT: [[MIN:%.*]] = call <2 x i64> @llvm.smin.v2i64(<2 x i64> [[CONV]], <2 x i64> splat (i64 2147483647))204; CHECK-BASE-NEXT: [[MAX:%.*]] = call <2 x i64> @llvm.smax.v2i64(<2 x i64> [[MIN]], <2 x i64> splat (i64 -2147483648))205; CHECK-BASE-NEXT: ret <2 x i64> [[MAX]]206;207; CHECK-MVEFP-LABEL: @v2f32_i32(208; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.fptosi.sat.v2i32.v2f32(<2 x float> [[IN:%.*]])209; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>210; CHECK-MVEFP-NEXT: ret <2 x i64> [[TMP2]]211;212; CHECK-FP64-LABEL: @v2f32_i32(213; CHECK-FP64-NEXT: [[TMP1:%.*]] = call <2 x i32> @llvm.fptosi.sat.v2i32.v2f32(<2 x float> [[IN:%.*]])214; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext <2 x i32> [[TMP1]] to <2 x i64>215; CHECK-FP64-NEXT: ret <2 x i64> [[TMP2]]216;217 %conv = fptosi <2 x float> %in to <2 x i64>218 %min = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %conv, <2 x i64> <i64 2147483647, i64 2147483647>)219 %max = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %min, <2 x i64> <i64 -2147483648, i64 -2147483648>)220 ret <2 x i64> %max221}222 223define <4 x i64> @v4f32_i32(<4 x float> %in) {224; CHECK-BASE-LABEL: @v4f32_i32(225; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi <4 x float> [[IN:%.*]] to <4 x i64>226; CHECK-BASE-NEXT: [[MIN:%.*]] = call <4 x i64> @llvm.smin.v4i64(<4 x i64> [[CONV]], <4 x i64> splat (i64 2147483647))227; CHECK-BASE-NEXT: [[MAX:%.*]] = call <4 x i64> @llvm.smax.v4i64(<4 x i64> [[MIN]], <4 x i64> splat (i64 -2147483648))228; CHECK-BASE-NEXT: ret <4 x i64> [[MAX]]229;230; CHECK-MVEFP-LABEL: @v4f32_i32(231; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[IN:%.*]])232; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext <4 x i32> [[TMP1]] to <4 x i64>233; CHECK-MVEFP-NEXT: ret <4 x i64> [[TMP2]]234;235; CHECK-FP64-LABEL: @v4f32_i32(236; CHECK-FP64-NEXT: [[TMP1:%.*]] = call <4 x i32> @llvm.fptosi.sat.v4i32.v4f32(<4 x float> [[IN:%.*]])237; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext <4 x i32> [[TMP1]] to <4 x i64>238; CHECK-FP64-NEXT: ret <4 x i64> [[TMP2]]239;240 %conv = fptosi <4 x float> %in to <4 x i64>241 %min = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %conv, <4 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)242 %max = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %min, <4 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)243 ret <4 x i64> %max244}245 246define <8 x i64> @v8f32_i32(<8 x float> %in) {247; CHECK-BASE-LABEL: @v8f32_i32(248; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi <8 x float> [[IN:%.*]] to <8 x i64>249; CHECK-BASE-NEXT: [[MIN:%.*]] = call <8 x i64> @llvm.smin.v8i64(<8 x i64> [[CONV]], <8 x i64> splat (i64 2147483647))250; CHECK-BASE-NEXT: [[MAX:%.*]] = call <8 x i64> @llvm.smax.v8i64(<8 x i64> [[MIN]], <8 x i64> splat (i64 -2147483648))251; CHECK-BASE-NEXT: ret <8 x i64> [[MAX]]252;253; CHECK-MVEFP-LABEL: @v8f32_i32(254; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call <8 x i32> @llvm.fptosi.sat.v8i32.v8f32(<8 x float> [[IN:%.*]])255; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext <8 x i32> [[TMP1]] to <8 x i64>256; CHECK-MVEFP-NEXT: ret <8 x i64> [[TMP2]]257;258; CHECK-FP64-LABEL: @v8f32_i32(259; CHECK-FP64-NEXT: [[TMP1:%.*]] = call <8 x i32> @llvm.fptosi.sat.v8i32.v8f32(<8 x float> [[IN:%.*]])260; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext <8 x i32> [[TMP1]] to <8 x i64>261; CHECK-FP64-NEXT: ret <8 x i64> [[TMP2]]262;263 %conv = fptosi <8 x float> %in to <8 x i64>264 %min = call <8 x i64> @llvm.smin.v8i64(<8 x i64> %conv, <8 x i64> <i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647, i64 2147483647>)265 %max = call <8 x i64> @llvm.smax.v8i64(<8 x i64> %min, <8 x i64> <i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648, i64 -2147483648>)266 ret <8 x i64> %max267}268 269define <4 x i32> @v4f16_i16(<4 x half> %in) {270; CHECK-BASE-LABEL: @v4f16_i16(271; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi <4 x half> [[IN:%.*]] to <4 x i32>272; CHECK-BASE-NEXT: [[MIN:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> [[CONV]], <4 x i32> splat (i32 32767))273; CHECK-BASE-NEXT: [[MAX:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> [[MIN]], <4 x i32> splat (i32 -32768))274; CHECK-BASE-NEXT: ret <4 x i32> [[MAX]]275;276; CHECK-MVEFP-LABEL: @v4f16_i16(277; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.fptosi.sat.v4i16.v4f16(<4 x half> [[IN:%.*]])278; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>279; CHECK-MVEFP-NEXT: ret <4 x i32> [[TMP2]]280;281; CHECK-FP64-LABEL: @v4f16_i16(282; CHECK-FP64-NEXT: [[TMP1:%.*]] = call <4 x i16> @llvm.fptosi.sat.v4i16.v4f16(<4 x half> [[IN:%.*]])283; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext <4 x i16> [[TMP1]] to <4 x i32>284; CHECK-FP64-NEXT: ret <4 x i32> [[TMP2]]285;286 %conv = fptosi <4 x half> %in to <4 x i32>287 %min = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %conv, <4 x i32> <i32 32767, i32 32767, i32 32767, i32 32767>)288 %max = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %min, <4 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768>)289 ret <4 x i32> %max290}291 292define <8 x i32> @v8f16_i16(<8 x half> %in) {293; CHECK-BASE-LABEL: @v8f16_i16(294; CHECK-BASE-NEXT: [[CONV:%.*]] = fptosi <8 x half> [[IN:%.*]] to <8 x i32>295; CHECK-BASE-NEXT: [[MIN:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> [[CONV]], <8 x i32> splat (i32 32767))296; CHECK-BASE-NEXT: [[MAX:%.*]] = call <8 x i32> @llvm.smax.v8i32(<8 x i32> [[MIN]], <8 x i32> splat (i32 -32768))297; CHECK-BASE-NEXT: ret <8 x i32> [[MAX]]298;299; CHECK-MVEFP-LABEL: @v8f16_i16(300; CHECK-MVEFP-NEXT: [[TMP1:%.*]] = call <8 x i16> @llvm.fptosi.sat.v8i16.v8f16(<8 x half> [[IN:%.*]])301; CHECK-MVEFP-NEXT: [[TMP2:%.*]] = sext <8 x i16> [[TMP1]] to <8 x i32>302; CHECK-MVEFP-NEXT: ret <8 x i32> [[TMP2]]303;304; CHECK-FP64-LABEL: @v8f16_i16(305; CHECK-FP64-NEXT: [[TMP1:%.*]] = call <8 x i16> @llvm.fptosi.sat.v8i16.v8f16(<8 x half> [[IN:%.*]])306; CHECK-FP64-NEXT: [[TMP2:%.*]] = sext <8 x i16> [[TMP1]] to <8 x i32>307; CHECK-FP64-NEXT: ret <8 x i32> [[TMP2]]308;309 %conv = fptosi <8 x half> %in to <8 x i32>310 %min = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %conv, <8 x i32> <i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767, i32 32767>)311 %max = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %min, <8 x i32> <i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768, i32 -32768>)312 ret <8 x i32> %max313}314 315 316declare i64 @llvm.smin.i64(i64, i64)317declare i64 @llvm.smax.i64(i64, i64)318declare i32 @llvm.smin.i32(i32, i32)319declare i32 @llvm.smax.i32(i32, i32)320declare <2 x i64> @llvm.smin.v2i64(<2 x i64>, <2 x i64>)321declare <2 x i64> @llvm.smax.v2i64(<2 x i64>, <2 x i64>)322declare <4 x i64> @llvm.smin.v4i64(<4 x i64>, <4 x i64>)323declare <4 x i64> @llvm.smax.v4i64(<4 x i64>, <4 x i64>)324declare <8 x i64> @llvm.smin.v8i64(<8 x i64>, <8 x i64>)325declare <8 x i64> @llvm.smax.v8i64(<8 x i64>, <8 x i64>)326declare <4 x i32> @llvm.smin.v4i32(<4 x i32>, <4 x i32>)327declare <4 x i32> @llvm.smax.v4i32(<4 x i32>, <4 x i32>)328declare <8 x i32> @llvm.smin.v8i32(<8 x i32>, <8 x i32>)329declare <8 x i32> @llvm.smax.v8i32(<8 x i32>, <8 x i32>)330