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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals2; RUN: opt -codegen-opt-level=1 -S -mtriple=aarch64-- -passes=atomic-expand %s | FileCheck %s3; RUN: opt -codegen-opt-level=1 -S -mtriple=aarch64-- -mattr=+outline-atomics -passes=atomic-expand %s | FileCheck %s --check-prefix=OUTLINE-ATOMICS4 5define void @atomic_swap_f16(ptr %ptr, half %val) !prof !0 {6; CHECK-LABEL: @atomic_swap_f16(7; CHECK-NEXT: [[TMP1:%.*]] = bitcast half [[VAL:%.*]] to i168; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]9; CHECK: atomicrmw.start:10; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i16) [[PTR:%.*]])11; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i1612; CHECK-NEXT: [[TMP4:%.*]] = zext i16 [[TMP1]] to i6413; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP4]], ptr elementtype(i16) [[PTR]])14; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP5]], 015; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]], !prof [[PROF1:![0-9]+]]16; CHECK: atomicrmw.end:17; CHECK-NEXT: [[TMP6:%.*]] = bitcast i16 [[TMP3]] to half18; CHECK-NEXT: ret void19;20; OUTLINE-ATOMICS-LABEL: @atomic_swap_f16(21; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast half [[VAL:%.*]] to i1622; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i16 [[TMP1]] acquire, align 223; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i16 [[TMP2]] to half24; OUTLINE-ATOMICS-NEXT: ret void25;26 %t1 = atomicrmw xchg ptr %ptr, half %val acquire27 ret void28}29 30define void @atomic_swap_f32(ptr %ptr, float %val) nounwind !prof !0 {31; CHECK-LABEL: @atomic_swap_f32(32; CHECK-NEXT: [[TMP1:%.*]] = bitcast float [[VAL:%.*]] to i3233; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]34; CHECK: atomicrmw.start:35; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i32) [[PTR:%.*]])36; CHECK-NEXT: [[TMP3:%.*]] = trunc i64 [[TMP2]] to i3237; CHECK-NEXT: [[TMP4:%.*]] = zext i32 [[TMP1]] to i6438; CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP4]], ptr elementtype(i32) [[PTR]])39; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP5]], 040; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]], !prof [[PROF1]]41; CHECK: atomicrmw.end:42; CHECK-NEXT: [[TMP6:%.*]] = bitcast i32 [[TMP3]] to float43; CHECK-NEXT: ret void44;45; OUTLINE-ATOMICS-LABEL: @atomic_swap_f32(46; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast float [[VAL:%.*]] to i3247; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i32 [[TMP1]] acquire, align 448; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i32 [[TMP2]] to float49; OUTLINE-ATOMICS-NEXT: ret void50;51 %t1 = atomicrmw xchg ptr %ptr, float %val acquire52 ret void53}54 55define void @atomic_swap_f64(ptr %ptr, double %val) nounwind !prof !0 {56; CHECK-LABEL: @atomic_swap_f64(57; CHECK-NEXT: [[TMP1:%.*]] = bitcast double [[VAL:%.*]] to i6458; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]59; CHECK: atomicrmw.start:60; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.ldaxr.p0(ptr elementtype(i64) [[PTR:%.*]])61; CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.aarch64.stxr.p0(i64 [[TMP1]], ptr elementtype(i64) [[PTR]])62; CHECK-NEXT: [[TRYAGAIN:%.*]] = icmp ne i32 [[TMP3]], 063; CHECK-NEXT: br i1 [[TRYAGAIN]], label [[ATOMICRMW_START]], label [[ATOMICRMW_END:%.*]], !prof [[PROF1]]64; CHECK: atomicrmw.end:65; CHECK-NEXT: [[TMP4:%.*]] = bitcast i64 [[TMP2]] to double66; CHECK-NEXT: ret void67;68; OUTLINE-ATOMICS-LABEL: @atomic_swap_f64(69; OUTLINE-ATOMICS-NEXT: [[TMP1:%.*]] = bitcast double [[VAL:%.*]] to i6470; OUTLINE-ATOMICS-NEXT: [[TMP2:%.*]] = atomicrmw xchg ptr [[PTR:%.*]], i64 [[TMP1]] acquire, align 871; OUTLINE-ATOMICS-NEXT: [[TMP3:%.*]] = bitcast i64 [[TMP2]] to double72; OUTLINE-ATOMICS-NEXT: ret void73;74 %t1 = atomicrmw xchg ptr %ptr, double %val acquire75 ret void76}77 78!0 = !{!"function_entry_count", i64 1000}79;.80; CHECK: attributes #[[ATTR0:[0-9]+]] = { nounwind }81; CHECK: attributes #[[ATTR1:[0-9]+]] = { nofree nounwind willreturn }82;.83; OUTLINE-ATOMICS: attributes #[[ATTR0:[0-9]+]] = { "target-features"="+outline-atomics" }84; OUTLINE-ATOMICS: attributes #[[ATTR1:[0-9]+]] = { nounwind "target-features"="+outline-atomics" }85;.86; CHECK: [[META0:![0-9]+]] = !{!"function_entry_count", i64 1000}87; CHECK: [[PROF1]] = !{!"unknown", !"atomic-expand"}88;.89; OUTLINE-ATOMICS: [[META0:![0-9]+]] = !{!"function_entry_count", i64 1000}90;.91