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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -passes=atomic-expand %s | FileCheck %s3; RUN: opt -mtriple=r600-mesa-mesa3d -S -passes=atomic-expand %s | FileCheck %s4 5define i32 @test_atomicrmw_nand_i32_flat(ptr %ptr, i32 %value) {6; CHECK-LABEL: @test_atomicrmw_nand_i32_flat(7; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[PTR:%.*]], align 48; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]9; CHECK: atomicrmw.start:10; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP1]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]11; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[LOADED]], [[VALUE:%.*]]12; CHECK-NEXT: [[NEW:%.*]] = xor i32 [[TMP2]], -113; CHECK-NEXT: [[TMP3:%.*]] = cmpxchg ptr [[PTR]], i32 [[LOADED]], i32 [[NEW]] seq_cst seq_cst, align 414; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP3]], 115; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP3]], 016; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]17; CHECK: atomicrmw.end:18; CHECK-NEXT: ret i32 [[NEWLOADED]]19;20 %res = atomicrmw nand ptr %ptr, i32 %value seq_cst21 ret i32 %res22}23 24define i32 @test_atomicrmw_nand_i32_global(ptr addrspace(1) %ptr, i32 %value) {25; CHECK-LABEL: @test_atomicrmw_nand_i32_global(26; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(1) [[PTR:%.*]], align 427; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]28; CHECK: atomicrmw.start:29; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP1]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]30; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[LOADED]], [[VALUE:%.*]]31; CHECK-NEXT: [[NEW:%.*]] = xor i32 [[TMP2]], -132; CHECK-NEXT: [[TMP3:%.*]] = cmpxchg ptr addrspace(1) [[PTR]], i32 [[LOADED]], i32 [[NEW]] seq_cst seq_cst, align 433; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP3]], 134; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP3]], 035; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]36; CHECK: atomicrmw.end:37; CHECK-NEXT: ret i32 [[NEWLOADED]]38;39 %res = atomicrmw nand ptr addrspace(1) %ptr, i32 %value seq_cst40 ret i32 %res41}42 43define i32 @test_atomicrmw_nand_i32_local(ptr addrspace(3) %ptr, i32 %value) {44; CHECK-LABEL: @test_atomicrmw_nand_i32_local(45; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr addrspace(3) [[PTR:%.*]], align 446; CHECK-NEXT: br label [[ATOMICRMW_START:%.*]]47; CHECK: atomicrmw.start:48; CHECK-NEXT: [[LOADED:%.*]] = phi i32 [ [[TMP1]], [[TMP0:%.*]] ], [ [[NEWLOADED:%.*]], [[ATOMICRMW_START]] ]49; CHECK-NEXT: [[TMP2:%.*]] = and i32 [[LOADED]], [[VALUE:%.*]]50; CHECK-NEXT: [[NEW:%.*]] = xor i32 [[TMP2]], -151; CHECK-NEXT: [[TMP3:%.*]] = cmpxchg ptr addrspace(3) [[PTR]], i32 [[LOADED]], i32 [[NEW]] seq_cst seq_cst, align 452; CHECK-NEXT: [[SUCCESS:%.*]] = extractvalue { i32, i1 } [[TMP3]], 153; CHECK-NEXT: [[NEWLOADED]] = extractvalue { i32, i1 } [[TMP3]], 054; CHECK-NEXT: br i1 [[SUCCESS]], label [[ATOMICRMW_END:%.*]], label [[ATOMICRMW_START]]55; CHECK: atomicrmw.end:56; CHECK-NEXT: ret i32 [[NEWLOADED]]57;58 %res = atomicrmw nand ptr addrspace(3) %ptr, i32 %value seq_cst59 ret i32 %res60}61