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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: opt -S -o - -mtriple=armv8-linux-gnueabihf -passes=atomic-expand %s -codegen-opt-level=1 | FileCheck %s3 4define i8 @test_atomic_xchg_i8(ptr %ptr, i8 %xchgend) {5; CHECK-LABEL: @test_atomic_xchg_i86; CHECK-NOT: fence7; CHECK: br label %[[LOOP:.*]]8; CHECK: [[LOOP]]:9; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldrex.p0(ptr elementtype(i8) %ptr)10; CHECK: [[OLDVAL:%.*]] = trunc i32 [[OLDVAL32]] to i811; CHECK: [[NEWVAL32:%.*]] = zext i8 %xchgend to i3212; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strex.p0(i32 [[NEWVAL32]], ptr elementtype(i8) %ptr)13; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 014; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]]15; CHECK: [[END]]:16; CHECK-NOT: fence17; CHECK: ret i8 [[OLDVAL]]18 %res = atomicrmw xchg ptr %ptr, i8 %xchgend monotonic19 ret i8 %res20}21 22define i16 @test_atomic_add_i16(ptr %ptr, i16 %addend) {23; CHECK-LABEL: @test_atomic_add_i1624; CHECK-NOT: fence25; CHECK: br label %[[LOOP:.*]]26; CHECK: [[LOOP]]:27; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i16) %ptr)28; CHECK: [[OLDVAL:%.*]] = trunc i32 [[OLDVAL32]] to i1629; CHECK: [[NEWVAL:%.*]] = add i16 [[OLDVAL]], %addend30; CHECK: [[NEWVAL32:%.*]] = zext i16 [[NEWVAL]] to i3231; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0(i32 [[NEWVAL32]], ptr elementtype(i16) %ptr)32; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 033; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]]34; CHECK: [[END]]:35; CHECK-NOT: fence36; CHECK: ret i16 [[OLDVAL]]37 %res = atomicrmw add ptr %ptr, i16 %addend seq_cst38 ret i16 %res39}40 41define i32 @test_atomic_sub_i32(ptr %ptr, i32 %subend) {42; CHECK-LABEL: @test_atomic_sub_i3243; CHECK-NOT: fence44; CHECK: br label %[[LOOP:.*]]45; CHECK: [[LOOP]]:46; CHECK: [[OLDVAL:%.*]] = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i32) %ptr)47; CHECK: [[NEWVAL:%.*]] = sub i32 [[OLDVAL]], %subend48; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strex.p0(i32 [[NEWVAL]], ptr elementtype(i32) %ptr)49; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 050; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]]51; CHECK: [[END]]:52; CHECK-NOT: fence53; CHECK: ret i32 [[OLDVAL]]54 %res = atomicrmw sub ptr %ptr, i32 %subend acquire55 ret i32 %res56}57 58define i64 @test_atomic_or_i64(ptr %ptr, i64 %orend) {59; CHECK-LABEL: @test_atomic_or_i6460; CHECK-NOT: fence61; CHECK: br label %[[LOOP:.*]]62; CHECK: [[LOOP]]:63; CHECK: [[LOHI:%.*]] = call { i32, i32 } @llvm.arm.ldaexd(ptr %ptr)64; CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 065; CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 166; CHECK: [[LO64:%.*]] = zext i32 [[LO]] to i6467; CHECK: [[HI64_TMP:%.*]] = zext i32 [[HI]] to i6468; CHECK: [[HI64:%.*]] = shl i64 [[HI64_TMP]], 3269; CHECK: [[OLDVAL:%.*]] = or i64 [[LO64]], [[HI64]]70; CHECK: [[NEWVAL:%.*]] = or i64 [[OLDVAL]], %orend71; CHECK: [[NEWLO:%.*]] = trunc i64 [[NEWVAL]] to i3272; CHECK: [[NEWHI_TMP:%.*]] = lshr i64 [[NEWVAL]], 3273; CHECK: [[NEWHI:%.*]] = trunc i64 [[NEWHI_TMP]] to i3274; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlexd(i32 [[NEWLO]], i32 [[NEWHI]], ptr %ptr)75; CHECK: [[TST:%.*]] = icmp ne i32 [[TRYAGAIN]], 076; CHECK: br i1 [[TST]], label %[[LOOP]], label %[[END:.*]]77; CHECK: [[END]]:78; CHECK-NOT: fence79; CHECK: ret i64 [[OLDVAL]]80 %res = atomicrmw or ptr %ptr, i64 %orend seq_cst81 ret i64 %res82}83 84define i8 @test_cmpxchg_i8_seqcst_seqcst(ptr %ptr, i8 %desired, i8 %newval) {85; CHECK-LABEL: @test_cmpxchg_i8_seqcst_seqcst86; CHECK-NOT: fence87; CHECK: br label %[[LOOP:.*]]88; CHECK: [[LOOP]]:89; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i8) %ptr)90; CHECK: [[OLDVAL:%.*]] = trunc i32 %1 to i891; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i8 [[OLDVAL]], %desired92; CHECK: br i1 [[SHOULD_STORE]], label %[[FENCED_STORE:.*]], label %[[NO_STORE_BB:cmpxchg.nostore]]93; CHECK: [[FENCED_STORE]]:94; CHECK-NEXT: br label %[[TRY_STORE:.*]]95; CHECK: [[TRY_STORE]]:96; CHECK: [[LOADED_TRYSTORE:%.*]] = phi i8 [ [[OLDVAL]], %[[FENCED_STORE]] ]97; CHECK: [[NEWVAL32:%.*]] = zext i8 %newval to i3298; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0(i32 [[NEWVAL32]], ptr elementtype(i8) %ptr)99; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0100; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]]101; CHECK: [[SUCCESS_BB]]:102; CHECK-NOT: fence_cst103; CHECK: br label %[[DONE:.*]]104; CHECK: [[NO_STORE_BB]]:105; CHECK-NEXT: [[LOADED_NOSTORE:%.*]] = phi i8 [ [[OLDVAL]], %[[LOOP]] ]106; CHECK-NEXT: call void @llvm.arm.clrex()107; CHECK-NEXT: br label %[[FAILURE_BB:.*]]108; CHECK: [[FAILURE_BB]]:109; CHECK-NEXT: [[LOADED_FAILURE:%.*]] = phi i8 [ [[LOADED_NOSTORE]], %[[NO_STORE_BB]] ]110; CHECK-NOT: fence_cst111; CHECK: br label %[[DONE]]112; CHECK: [[DONE]]:113; CHECK: [[LOADED_EXIT:%.*]] = phi i8 [ [[LOADED_TRYSTORE]], %[[SUCCESS_BB]] ], [ [[LOADED_FAILURE]], %[[FAILURE_BB]] ]114; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ]115; CHECK: ret i8 [[LOADED_EXIT]]116 %pairold = cmpxchg ptr %ptr, i8 %desired, i8 %newval seq_cst seq_cst117 %old = extractvalue { i8, i1 } %pairold, 0118 ret i8 %old119}120 121define i16 @test_cmpxchg_i16_seqcst_monotonic(ptr %ptr, i16 %desired, i16 %newval) {122; CHECK-LABEL: @test_cmpxchg_i16_seqcst_monotonic123; CHECK-NOT: fence124; CHECK: br label %[[LOOP:.*]]125; CHECK: [[LOOP]]:126; CHECK: [[OLDVAL32:%.*]] = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i16) %ptr)127; CHECK: [[OLDVAL:%.*]] = trunc i32 %1 to i16128; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i16 [[OLDVAL]], %desired129; CHECK: br i1 [[SHOULD_STORE]], label %[[FENCED_STORE:.*]], label %[[NO_STORE_BB:cmpxchg.nostore]]130; CHECK: [[FENCED_STORE]]:131; CHECK-NEXT: br label %[[TRY_STORE:.*]]132; CHECK: [[TRY_STORE]]:133; CHECK: [[LOADED_TRYSTORE:%.*]] = phi i16 [ [[OLDVAL]], %[[FENCED_STORE]] ]134; CHECK: [[NEWVAL32:%.*]] = zext i16 %newval to i32135; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.stlex.p0(i32 [[NEWVAL32]], ptr elementtype(i16) %ptr)136; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0137; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]]138; CHECK: [[SUCCESS_BB]]:139; CHECK-NOT: fence140; CHECK: br label %[[DONE:.*]]141; CHECK: [[NO_STORE_BB]]:142; The PHI is not required.143; CHECK-NEXT: [[LOADED_NOSTORE:%.*]] = phi i16 [ [[OLDVAL]], %[[LOOP]] ]144; CHECK-NEXT: call void @llvm.arm.clrex()145; CHECK-NEXT: br label %[[FAILURE_BB:.*]]146; CHECK: [[FAILURE_BB]]:147; CHECK-NEXT: [[LOADED_FAILURE:%.*]] = phi i16 [ [[LOADED_NOSTORE]], %[[NO_STORE_BB]] ]148; CHECK-NOT: fence149; CHECK: br label %[[DONE]]150; CHECK: [[DONE]]:151; CHECK: [[LOADED_EXIT:%.*]] = phi i16 [ [[LOADED_TRYSTORE]], %[[SUCCESS_BB]] ], [ [[LOADED_FAILURE]], %[[FAILURE_BB]] ]152; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ]153; CHECK: ret i16 [[LOADED_EXIT]]154 %pairold = cmpxchg ptr %ptr, i16 %desired, i16 %newval seq_cst monotonic155 %old = extractvalue { i16, i1 } %pairold, 0156 ret i16 %old157}158 159define i32 @test_cmpxchg_i32_acquire_acquire(ptr %ptr, i32 %desired, i32 %newval) {160; CHECK-LABEL: @test_cmpxchg_i32_acquire_acquire161; CHECK-NOT: fence162; CHECK: br label %[[LOOP:.*]]163; CHECK: [[LOOP]]:164; CHECK: [[OLDVAL:%.*]] = call i32 @llvm.arm.ldaex.p0(ptr elementtype(i32) %ptr)165; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i32 [[OLDVAL]], %desired166; CHECK: br i1 [[SHOULD_STORE]], label %[[FENCED_STORE:.*]], label %[[NO_STORE_BB:cmpxchg.nostore]]167; CHECK: [[FENCED_STORE]]:168; CHECK-NEXT: br label %[[TRY_STORE:.*]]169; CHECK: [[TRY_STORE]]:170; CHECK: [[LOADED_TRYSTORE:%.*]] = phi i32 [ [[OLDVAL]], %[[FENCED_STORE]] ]171; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strex.p0(i32 %newval, ptr elementtype(i32) %ptr)172; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0173; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]]174; CHECK: [[SUCCESS_BB]]:175; CHECK-NOT: fence_cst176; CHECK: br label %[[DONE:.*]]177; CHECK: [[NO_STORE_BB]]:178; CHECK-NEXT: [[LOADED_NOSTORE:%.*]] = phi i32 [ [[OLDVAL]], %[[LOOP]] ]179; CHECK-NEXT: call void @llvm.arm.clrex()180; CHECK-NEXT: br label %[[FAILURE_BB:.*]]181; CHECK: [[FAILURE_BB]]:182; CHECK-NEXT: [[LOADED_FAILURE:%.*]] = phi i32 [ [[LOADED_NOSTORE]], %[[NO_STORE_BB]] ]183; CHECK-NOT: fence_cst184; CHECK: br label %[[DONE]]185; CHECK: [[DONE]]:186; CHECK: [[LOADED_EXIT:%.*]] = phi i32 [ [[LOADED_TRYSTORE]], %[[SUCCESS_BB]] ], [ [[LOADED_FAILURE]], %[[FAILURE_BB]] ]187; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ]188; CHECK: ret i32 [[LOADED_EXIT]]189 %pairold = cmpxchg ptr %ptr, i32 %desired, i32 %newval acquire acquire190 %old = extractvalue { i32, i1 } %pairold, 0191 ret i32 %old192}193 194define i64 @test_cmpxchg_i64_monotonic_monotonic(ptr %ptr, i64 %desired, i64 %newval) {195; CHECK-LABEL: @test_cmpxchg_i64_monotonic_monotonic196; CHECK-NOT: fence197; CHECK: br label %[[LOOP:.*]]198; CHECK: [[LOOP]]:199; CHECK: [[LOHI:%.*]] = call { i32, i32 } @llvm.arm.ldrexd(ptr %ptr)200; CHECK: [[LO:%.*]] = extractvalue { i32, i32 } [[LOHI]], 0201; CHECK: [[HI:%.*]] = extractvalue { i32, i32 } [[LOHI]], 1202; CHECK: [[LO64:%.*]] = zext i32 [[LO]] to i64203; CHECK: [[HI64_TMP:%.*]] = zext i32 [[HI]] to i64204; CHECK: [[HI64:%.*]] = shl i64 [[HI64_TMP]], 32205; CHECK: [[OLDVAL:%.*]] = or i64 [[LO64]], [[HI64]]206; CHECK: [[SHOULD_STORE:%.*]] = icmp eq i64 [[OLDVAL]], %desired207; CHECK: br i1 [[SHOULD_STORE]], label %[[FENCED_STORE:.*]], label %[[NO_STORE_BB:cmpxchg.nostore]]208; CHECK: [[FENCED_STORE]]:209; CHECK-NEXT: br label %[[TRY_STORE:.*]]210; CHECK: [[TRY_STORE]]:211; CHECK: [[LOADED_TRYSTORE:%.*]] = phi i64 [ [[OLDVAL]], %[[FENCED_STORE]] ]212; CHECK: [[NEWLO:%.*]] = trunc i64 %newval to i32213; CHECK: [[NEWHI_TMP:%.*]] = lshr i64 %newval, 32214; CHECK: [[NEWHI:%.*]] = trunc i64 [[NEWHI_TMP]] to i32215; CHECK: [[TRYAGAIN:%.*]] = call i32 @llvm.arm.strexd(i32 [[NEWLO]], i32 [[NEWHI]], ptr %ptr)216; CHECK: [[TST:%.*]] = icmp eq i32 [[TRYAGAIN]], 0217; CHECK: br i1 [[TST]], label %[[SUCCESS_BB:.*]], label %[[LOOP]]218; CHECK: [[SUCCESS_BB]]:219; CHECK-NOT: fence_cst220; CHECK: br label %[[DONE:.*]]221; CHECK: [[NO_STORE_BB]]:222; CHECK-NEXT: [[LOADED_NOSTORE:%.*]] = phi i64 [ [[OLDVAL]], %[[LOOP]] ]223; CHECK-NEXT: call void @llvm.arm.clrex()224; CHECK-NEXT: br label %[[FAILURE_BB:.*]]225; CHECK: [[FAILURE_BB]]:226; CHECK-NEXT: [[LOADED_FAILURE:%.*]] = phi i64 [ [[LOADED_NOSTORE]], %[[NO_STORE_BB]] ]227; CHECK-NOT: fence_cst228; CHECK: br label %[[DONE]]229; CHECK: [[DONE]]:230; CHECK: [[LOADED_EXIT:%.*]] = phi i64 [ [[LOADED_TRYSTORE]], %[[SUCCESS_BB]] ], [ [[LOADED_FAILURE]], %[[FAILURE_BB]] ]231; CHECK: [[SUCCESS:%.*]] = phi i1 [ true, %[[SUCCESS_BB]] ], [ false, %[[FAILURE_BB]] ]232; CHECK: ret i64 [[LOADED_EXIT]]233 %pairold = cmpxchg ptr %ptr, i64 %desired, i64 %newval monotonic monotonic234 %old = extractvalue { i64, i1 } %pairold, 0235 ret i64 %old236}237