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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=arm64-unknown-unknown -O3 < %s | FileCheck %s3; This test should show that @f and @f_without_freeze generate equivalent4; assembly5; REQUIRES: aarch64-registered-target6 7define void @f(ptr %p, i32 %n, i32 %m) {8; CHECK-LABEL: f:9; CHECK: // %bb.0: // %entry10; CHECK-NEXT: add w8, w2, #111; CHECK-NEXT: .LBB0_1: // %loop12; CHECK-NEXT: // =>This Inner Loop Header: Depth=113; CHECK-NEXT: subs w1, w1, #114; CHECK-NEXT: strb wzr, [x0, w8, sxtw]15; CHECK-NEXT: add w8, w8, #116; CHECK-NEXT: b.ne .LBB0_117; CHECK-NEXT: // %bb.2: // %exit18; CHECK-NEXT: ret19entry:20 br label %loop21loop:22 %i = phi i32 [0, %entry], [%i.next, %loop]23 %i.next = add i32 %i, 124 %i.next.fr = freeze i32 %i.next25 %j = add i32 %m, %i.next.fr26 %q = getelementptr i8, ptr %p, i32 %j27 store i8 0, ptr %q28 %cond = icmp eq i32 %i.next.fr, %n29 br i1 %cond, label %exit, label %loop30exit:31 ret void32}33 34define void @f_without_freeze(ptr %p, i32 %n, i32 %m) {35; CHECK-LABEL: f_without_freeze:36; CHECK: // %bb.0: // %entry37; CHECK-NEXT: add w8, w2, #138; CHECK-NEXT: .LBB1_1: // %loop39; CHECK-NEXT: // =>This Inner Loop Header: Depth=140; CHECK-NEXT: subs w1, w1, #141; CHECK-NEXT: strb wzr, [x0, w8, sxtw]42; CHECK-NEXT: add w8, w8, #143; CHECK-NEXT: b.ne .LBB1_144; CHECK-NEXT: // %bb.2: // %exit45; CHECK-NEXT: ret46entry:47 br label %loop48loop:49 %i = phi i32 [0, %entry], [%i.next, %loop]50 %i.next = add i32 %i, 151 %j = add i32 %m, %i.next52 %q = getelementptr i8, ptr %p, i32 %j53 store i8 0, ptr %q54 %cond = icmp eq i32 %i.next, %n55 br i1 %cond, label %exit, label %loop56exit:57 ret void58}59