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1; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=aarch64-linux %s | FileCheck -enable-var-scope %s2 3; Test for CodeGenPrepare::optimizeLoadExt(): simple case: two loads4; feeding a phi that zext's each loaded value.5define i32 @test_free_zext(ptr %ptr, ptr %ptr2, i32 %c) {6; CHECK-LABEL: @test_free_zext(7bb1:8; CHECK: bb1:9; CHECK: %[[T1:.*]] = load10; CHECK: %[[A1:.*]] = and i32 %[[T1]], 6553511 %load1 = load i32, ptr %ptr, align 412 %cmp = icmp ne i32 %c, 013 br i1 %cmp, label %bb2, label %bb314bb2:15; CHECK: bb2:16; CHECK: %[[T2:.*]] = load17; CHECK: %[[A2:.*]] = and i32 %[[T2]], 6553518 %load2 = load i32, ptr %ptr2, align 419 br label %bb320bb3:21; CHECK: bb3:22; CHECK: phi i32 [ %[[A1]], %bb1 ], [ %[[A2]], %bb2 ]23 %phi = phi i32 [ %load1, %bb1 ], [ %load2, %bb2 ]24 %and = and i32 %phi, 6553525 ret i32 %and26}27 28; Test for CodeGenPrepare::optimizeLoadExt(): exercise all opcode29; cases of active bit calculation.30define i32 @test_free_zext2(ptr %ptr, ptr %dst16, ptr %dst32, i32 %c) {31; CHECK-LABEL: @test_free_zext2(32bb1:33; CHECK: bb1:34; CHECK: %[[T1:.*]] = load35; CHECK: %[[A1:.*]] = and i32 %[[T1]], 6553536 %load1 = load i32, ptr %ptr, align 437 %cmp = icmp ne i32 %c, 038 br i1 %cmp, label %bb2, label %bb439bb2:40; CHECK: bb2:41 %trunc = trunc i32 %load1 to i1642 store i16 %trunc, ptr %dst16, align 243 br i1 %cmp, label %bb3, label %bb444bb3:45; CHECK: bb3:46 %shl = shl i32 %load1, 1647 store i32 %shl, ptr %dst32, align 448 br label %bb449bb4:50; CHECK: bb4:51; CHECK-NOT: and52; CHECK: ret i32 %[[A1]]53 %and = and i32 %load1, 6553554 ret i32 %and55}56 57; Test for CodeGenPrepare::optimizeLoadExt(): check case of zext-able58; load feeding a phi in the same block.59define void @test_free_zext3(ptr %ptr, ptr %ptr2, ptr %dst, ptr %c) {60; CHECK-LABEL: @test_free_zext3(61bb1:62; CHECK: bb1:63; CHECK: %[[T1:.*]] = load64; CHECK: %[[A1:.*]] = and i32 %[[T1]], 6553565 %load1 = load i32, ptr %ptr, align 466 br label %loop67loop:68; CHECK: loop:69; CHECK: phi i32 [ %[[A1]], %bb1 ], [ %[[A2:.*]], %loop ]70 %phi = phi i32 [ %load1, %bb1 ], [ %load2, %loop ]71 %and = and i32 %phi, 6553572 store i32 %and, ptr %dst, align 473 %idx = load volatile i64, ptr %c, align 474 %addr = getelementptr inbounds i32, ptr %ptr2, i64 %idx75; CHECK: %[[T2:.*]] = load i3276; CHECK: %[[A2]] = and i32 %[[T2]], 6553577 %load2 = load i32, ptr %addr, align 478 %cmp = icmp ne i64 %idx, 079 br i1 %cmp, label %loop, label %end80end:81 ret void82}83