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1; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=amdgcn-unknown-unknown < %s | FileCheck -check-prefix=ASC -check-prefix=COMMON %s2 3; COMMON-LABEL: @test_sink_ptrtoint_asc(4; ASC: addrspacecast5; ASC-NOT: ptrtoint6; ASC-NOT: inttoptr7 8define amdgpu_kernel void @test_sink_ptrtoint_asc(ptr addrspace(1) nocapture %arg, ptr addrspace(1) nocapture readonly %arg1, ptr addrspace(3) %arg2) #0 {9bb:10  %tmp = getelementptr inbounds float, ptr addrspace(3) %arg2, i32 1611  %tmp2 = tail call i32 @llvm.amdgcn.workitem.id.x() #112  %tmp3 = sext i32 %tmp2 to i6413  %tmp4 = getelementptr inbounds float, ptr addrspace(1) %arg1, i64 %tmp314  %tmp5 = load float, ptr addrspace(1) %tmp4, align 415  %tmp6 = addrspacecast ptr addrspace(3) %tmp to ptr addrspace(4)16  %tmp7 = fcmp olt float %tmp5, 8.388608e+0617  br i1 %tmp7, label %bb8, label %bb1418 19bb8:                                              ; preds = %bb20  %tmp9 = tail call float @llvm.fma.f32(float %tmp5, float 0x3FE45F3060000000, float 5.000000e-01) #121  %tmp10 = fmul float %tmp9, 0x3E74442D0000000022  %tmp11 = fsub float -0.000000e+00, %tmp1023  %tmp12 = tail call float @llvm.fma.f32(float %tmp9, float 0x3E74442D00000000, float %tmp11) #124  store float %tmp12, ptr addrspace(4) %tmp6, align 425  %tmp13 = fsub float -0.000000e+00, %tmp1226  br label %bb1527 28bb14:                                             ; preds = %bb29  store float 2.000000e+00, ptr addrspace(4) %tmp6, align 430  br label %bb1531 32bb15:                                             ; preds = %bb14, %bb833  %tmp16 = phi float [ 0.000000e+00, %bb14 ], [ %tmp13, %bb8 ]34  %tmp17 = fsub float -0.000000e+00, %tmp1635  %tmp18 = tail call float @llvm.fma.f32(float 1.000000e+00, float 0x3FF0AAAAA0000000, float %tmp17) #136  %tmp19 = fsub float 2.187500e-01, %tmp1837  %tmp20 = fsub float 7.187500e-01, %tmp1938  %tmp21 = fcmp ogt float %tmp5, 1.600000e+0139  %tmp22 = select i1 %tmp21, float 0x7FF8000000000000, float %tmp2040  %tmp23 = getelementptr inbounds float, ptr addrspace(1) %arg, i64 %tmp341  store float %tmp22, ptr addrspace(1) %tmp23, align 442  ret void43}44 45declare float @llvm.fma.f32(float, float, float) #146declare i32 @llvm.amdgcn.workitem.id.x() #147 48attributes #0 = { nounwind }49attributes #1 = { nounwind readnone }50