100 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=powerpc64-unknown-linux-gnu -data-layout="E-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefix=BE %s3; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=powerpc64le-unknown-linux-gnu -data-layout="e-m:e-i64:64-n32:64" -force-split-store < %s | FileCheck --check-prefix=LE %s4 5define void @split_store_align1(float %x, ptr %p) {6; BE-LABEL: @split_store_align1(7; BE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i328; BE-NEXT: [[Z:%.*]] = zext i32 0 to i649; BE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 3210; BE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i6411; BE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]12; BE-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 113; BE-NEXT: store i32 [[B]], ptr [[TMP2]], align 114; BE-NEXT: store i32 0, ptr [[P]], align 115; BE-NEXT: ret void16;17; LE-LABEL: @split_store_align1(18; LE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i3219; LE-NEXT: [[Z:%.*]] = zext i32 0 to i6420; LE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 3221; LE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i6422; LE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]23; LE-NEXT: store i32 [[B]], ptr [[P:%.*]], align 124; LE-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 125; LE-NEXT: store i32 0, ptr [[TMP3]], align 126; LE-NEXT: ret void27;28 %b = bitcast float %x to i3229 %z = zext i32 0 to i6430 %s = shl nuw nsw i64 %z, 3231 %z2 = zext i32 %b to i6432 %o = or i64 %s, %z233 store i64 %o, ptr %p, align 134 ret void35}36 37define void @split_store_align2(float %x, ptr %p) {38; BE-LABEL: @split_store_align2(39; BE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i3240; BE-NEXT: [[Z:%.*]] = zext i32 0 to i6441; BE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 3242; BE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i6443; BE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]44; BE-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 145; BE-NEXT: store i32 [[B]], ptr [[TMP2]], align 246; BE-NEXT: store i32 0, ptr [[P]], align 247; BE-NEXT: ret void48;49; LE-LABEL: @split_store_align2(50; LE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i3251; LE-NEXT: [[Z:%.*]] = zext i32 0 to i6452; LE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 3253; LE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i6454; LE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]55; LE-NEXT: store i32 [[B]], ptr [[P:%.*]], align 256; LE-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 157; LE-NEXT: store i32 0, ptr [[TMP3]], align 258; LE-NEXT: ret void59;60 %b = bitcast float %x to i3261 %z = zext i32 0 to i6462 %s = shl nuw nsw i64 %z, 3263 %z2 = zext i32 %b to i6464 %o = or i64 %s, %z265 store i64 %o, ptr %p, align 266 ret void67}68 69define void @split_store_align8(float %x, ptr %p) {70; BE-LABEL: @split_store_align8(71; BE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i3272; BE-NEXT: [[Z:%.*]] = zext i32 0 to i6473; BE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 3274; BE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i6475; BE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]76; BE-NEXT: [[TMP2:%.*]] = getelementptr i32, ptr [[P:%.*]], i32 177; BE-NEXT: store i32 [[B]], ptr [[TMP2]], align 478; BE-NEXT: store i32 0, ptr [[P]], align 879; BE-NEXT: ret void80;81; LE-LABEL: @split_store_align8(82; LE-NEXT: [[B:%.*]] = bitcast float [[X:%.*]] to i3283; LE-NEXT: [[Z:%.*]] = zext i32 0 to i6484; LE-NEXT: [[S:%.*]] = shl nuw nsw i64 [[Z]], 3285; LE-NEXT: [[Z2:%.*]] = zext i32 [[B]] to i6486; LE-NEXT: [[O:%.*]] = or i64 [[S]], [[Z2]]87; LE-NEXT: store i32 [[B]], ptr [[P:%.*]], align 888; LE-NEXT: [[TMP3:%.*]] = getelementptr i32, ptr [[P]], i32 189; LE-NEXT: store i32 0, ptr [[TMP3]], align 490; LE-NEXT: ret void91;92 %b = bitcast float %x to i3293 %z = zext i32 0 to i6494 %s = shl nuw nsw i64 %z, 3295 %z2 = zext i32 %b to i6496 %o = or i64 %s, %z297 store i64 %o, ptr %p, align 898 ret void99}100