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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv32 %s \3; RUN: | FileCheck --check-prefixes=CHECK,NOZBS %s4; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv32 -mattr=+zbs %s \5; RUN: | FileCheck --check-prefixes=CHECK,ZBS %s6; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv64 %s \7; RUN: | FileCheck --check-prefixes=CHECK,NOZBS %s8; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' -mtriple=riscv64 -mattr=zbs %s \9; RUN: | FileCheck --check-prefixes=CHECK,ZBS %s10 11@A = global i32 zeroinitializer12 13; And should be sunk when Zbs is present and the mask doesn't fit in ANDI's14; immediate.15define i32 @and_sink1(i32 %a, i1 %c) {16; NOZBS-LABEL: @and_sink1(17; NOZBS-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 204818; NOZBS-NEXT: br label [[BB0:%.*]]19; NOZBS: bb0:20; NOZBS-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 021; NOZBS-NEXT: store i32 0, ptr @A, align 422; NOZBS-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]]23; NOZBS: bb2:24; NOZBS-NEXT: ret i32 025;26; ZBS-LABEL: @and_sink1(27; ZBS-NEXT: br label [[BB0:%.*]]28; ZBS: bb0:29; ZBS-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], 204830; ZBS-NEXT: [[CMP:%.*]] = icmp eq i32 [[TMP1]], 031; ZBS-NEXT: store i32 0, ptr @A, align 432; ZBS-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]]33; ZBS: bb2:34; ZBS-NEXT: ret i32 035;36 %and = and i32 %a, 204837 br label %bb038bb0:39 %cmp = icmp eq i32 %and, 040 store i32 0, ptr @A41 br i1 %cmp, label %bb0, label %bb242bb2:43 ret i32 044}45 46; Don't sink when the mask has more than 1 bit set.47define i32 @and_sink2(i32 %a) {48; CHECK-LABEL: @and_sink2(49; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 204950; CHECK-NEXT: br label [[BB0:%.*]]51; CHECK: bb0:52; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 053; CHECK-NEXT: store i32 0, ptr @A, align 454; CHECK-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]]55; CHECK: bb2:56; CHECK-NEXT: ret i32 057;58 %and = and i32 %a, 204959 br label %bb060bb0:61 %cmp = icmp eq i32 %and, 062 store i32 0, ptr @A63 br i1 %cmp, label %bb0, label %bb264bb2:65 ret i32 066}67 68; Don't sink when the mask fits in ANDI's immediate.69define i32 @and_sink3(i32 %a) {70; CHECK-LABEL: @and_sink3(71; CHECK-NEXT: [[AND:%.*]] = and i32 [[A:%.*]], 102472; CHECK-NEXT: br label [[BB0:%.*]]73; CHECK: bb0:74; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 075; CHECK-NEXT: store i32 0, ptr @A, align 476; CHECK-NEXT: br i1 [[CMP]], label [[BB0]], label [[BB2:%.*]]77; CHECK: bb2:78; CHECK-NEXT: ret i32 079;80 %and = and i32 %a, 102481 br label %bb082bb0:83 %cmp = icmp eq i32 %and, 084 store i32 0, ptr @A85 br i1 %cmp, label %bb0, label %bb286bb2:87 ret i32 088}89