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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes='require<profile-summary>,function(codegenprepare)' -S -mtriple=x86_64-linux < %s | FileCheck %s3 4define i32 @test1(ptr %d) nounwind {5; CHECK-LABEL: @test1(6; CHECK-NEXT: entry:7; CHECK-NEXT: [[L:%.*]] = load i8, ptr [[D:%.*]], align 18; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i8 [[L]], 09; CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TMP0]] to i3210; CHECK-NEXT: ret i32 [[CONV]]11;12entry:13 %l = load i8, ptr %d14 %cmp = icmp eq i8 %l, 015 br i1 %cmp, label %exit, label %if.end16 17if.end:18 %gep = getelementptr i8, ptr %d, i32 4219 %call = call i64 @foo(ptr %gep) nounwind readonly willreturn20 %cmp2 = icmp ne i64 %call, 021 call void @llvm.assume(i1 %cmp2)22 br label %exit23 24exit:25 %conv = zext i1 %cmp to i3226 ret i32 %conv27}28 29define i32 @test2(i32 %N) nounwind {30; CHECK-LABEL: @test2(31; CHECK-NEXT: entry:32; CHECK-NEXT: br label [[HEADER:%.*]]33; CHECK: header:34; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]35; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 136; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]37; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[HEADER]]38; CHECK: exit:39; CHECK-NEXT: ret i32 [[IV]]40;41entry:42 br label %header43 44header:45 %iv = phi i32 [0, %entry], [%iv.inc, %header]46 %iv2 = phi i32 [0, %entry], [%iv2.inc, %header]47 %iv.inc = add i32 %iv, 148 %iv2.inc = add i32 %iv2, 149 %cmp = icmp eq i32 %iv, %N50 %cmp2 = icmp sle i32 %iv2, %N51 call void @llvm.assume(i1 %cmp2)52 br i1 %cmp, label %exit, label %header53 54exit:55 ret i32 %iv56}57 58define i32 @test3(i32 %N) nounwind {59; CHECK-LABEL: @test3(60; CHECK-NEXT: entry:61; CHECK-NEXT: br label [[HEADER:%.*]]62; CHECK: header:63; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]64; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 165; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]66; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[HEADER]]67; CHECK: exit:68; CHECK-NEXT: ret i32 [[IV]]69;70entry:71 br label %header72 73header:74 %iv = phi i32 [0, %entry], [%iv.inc, %header]75 %iv2 = phi i32 [0, %entry], [%iv2.inc, %header]76 %iv.inc = add i32 %iv, 177 %iv2.inc = add i32 %iv2, 178 %cmp = icmp eq i32 %iv, %N79 %cmp2 = icmp sle i32 %iv2.inc, %N80 call void @llvm.assume(i1 %cmp2)81 br i1 %cmp, label %exit, label %header82 83exit:84 ret i32 %iv85}86 87; Two assumes case.88define i32 @test4(i32 %N) nounwind {89; CHECK-LABEL: @test4(90; CHECK-NEXT: entry:91; CHECK-NEXT: br label [[HEADER:%.*]]92; CHECK: header:93; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]94; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 195; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]96; CHECK-NEXT: br i1 [[CMP]], label [[EXIT:%.*]], label [[HEADER]]97; CHECK: exit:98; CHECK-NEXT: ret i32 [[IV]]99;100entry:101 br label %header102 103header:104 %iv = phi i32 [0, %entry], [%iv.inc, %header]105 %iv2 = phi i32 [0, %entry], [%iv2.inc, %header]106 %iv.inc = add i32 %iv, 1107 %iv2.inc = add i32 %iv2, 1108 %cmp = icmp eq i32 %iv, %N109 %cmp2 = icmp sle i32 %iv2.inc, %N110 call void @llvm.assume(i1 %cmp2)111 %cmp3 = icmp sge i32 %iv2.inc, 0112 call void @llvm.assume(i1 %cmp3)113 br i1 %cmp, label %exit, label %header114 115exit:116 ret i32 %iv117}118 119; phi is used in assume and in compare.120define i32 @test5(i32 %N, i32 %M) nounwind {121; CHECK-LABEL: @test5(122; CHECK-NEXT: entry:123; CHECK-NEXT: br label [[HEADER:%.*]]124; CHECK: header:125; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_INC:%.*]], [[HEADER]] ]126; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[IV2_INC:%.*]], [[HEADER]] ]127; CHECK-NEXT: [[IV_INC]] = add i32 [[IV]], 1128; CHECK-NEXT: [[IV2_INC]] = add i32 [[IV2]], 1129; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[IV]], [[N:%.*]]130; CHECK-NEXT: [[CMP3:%.*]] = icmp sge i32 [[IV2_INC]], [[M:%.*]]131; CHECK-NEXT: [[CMP4:%.*]] = and i1 [[CMP]], [[CMP3]]132; CHECK-NEXT: br i1 [[CMP4]], label [[EXIT:%.*]], label [[HEADER]]133; CHECK: exit:134; CHECK-NEXT: ret i32 [[IV]]135;136entry:137 br label %header138 139header:140 %iv = phi i32 [0, %entry], [%iv.inc, %header]141 %iv2 = phi i32 [0, %entry], [%iv2.inc, %header]142 %iv.inc = add i32 %iv, 1143 %iv2.inc = add i32 %iv2, 1144 %cmp = icmp eq i32 %iv, %N145 %cmp2 = icmp sle i32 %iv2.inc, %N146 call void @llvm.assume(i1 %cmp2)147 %cmp3 = icmp sge i32 %iv2.inc, %M148 %cmp4 = and i1 %cmp, %cmp3149 br i1 %cmp4, label %exit, label %header150 151exit:152 ret i32 %iv153}154 155declare i64 @foo(ptr) nounwind readonly willreturn156declare void @llvm.assume(i1 noundef) nounwind willreturn157