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1; REQUIRES: aarch64-registered-target2; RUN: opt -passes='require<profile-summary>,function(codegenprepare)'  < %s  -mtriple=aarch64-none-linux-gnu -S  | FileCheck %s3 4target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"5target triple = "aarch64--linux-gnu"6 7; Expect to skip merging two empty blocks (sw.bb and sw.bb2) into sw.epilog8; as both of them are unlikely executed.9define i32 @f_switch(i32 %c)  {10; CHECK-LABEL: @f_switch11; CHECK-LABEL: entry:12; CHECK: i32 10, label %sw.bb13; CHECK: i32 20, label %sw.bb214entry:15  switch i32 %c, label %sw.default [16    i32 10, label %sw.bb17    i32 20, label %sw.bb218    i32 30, label %sw.bb319    i32 40, label %sw.bb420  ], !prof !021 22sw.bb:                                            ; preds = %entry23  br label %sw.epilog24 25sw.bb2:                                           ; preds = %entry26  br label %sw.epilog27 28sw.bb3:                                           ; preds = %entry29  call void @callcase3()30  br label %sw.epilog31 32sw.bb4:                                           ; preds = %entry33  call void @callcase4()34  br label %sw.epilog35 36sw.default:                                       ; preds = %entry37  call void @calldefault()38  br label %sw.epilog39 40; CHECK-LABEL: sw.epilog:41; CHECK: %fp.0 = phi ptr [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %sw.bb ]42sw.epilog:                                        ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb43  %fp.0 = phi ptr [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %sw.bb ]44  call void %fp.0()45  ret i32 046}47 48; Expect not to merge sw.bb2 because of the conflict in the incoming value from49; sw.bb which is already merged.50define i32 @f_switch2(i32 %c)  {51; CHECK-LABEL: @f_switch252; CHECK-LABEL: entry:53; CHECK: i32 10, label %sw.epilog54; CHECK: i32 20, label %sw.bb255entry:56  switch i32 %c, label %sw.default [57    i32 10, label %sw.bb58    i32 20, label %sw.bb259    i32 30, label %sw.bb360    i32 40, label %sw.bb461  ], !prof !162 63sw.bb:                                            ; preds = %entry64  br label %sw.epilog65 66sw.bb2:                                           ; preds = %entry67  br label %sw.epilog68 69sw.bb3:                                           ; preds = %entry70  call void @callcase3()71  br label %sw.epilog72 73sw.bb4:                                           ; preds = %entry74  call void @callcase4()75  br label %sw.epilog76 77sw.default:                                       ; preds = %entry78  call void @calldefault()79  br label %sw.epilog80 81; CHECK-LABEL: sw.epilog:82; CHECK: %fp.0 = phi ptr [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %entry ]83sw.epilog:                                        ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb84  %fp.0 = phi ptr [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F2, %sw.bb2 ], [ @F1, %sw.bb ]85  call void %fp.0()86  ret i32 087}88 89; Multiple empty blocks should be considered together if all incoming values90; from them are same.  We expect to merge both empty blocks (sw.bb and sw.bb2)91; because the sum of frequencies are higer than the threshold.92define i32 @f_switch3(i32 %c)  {93; CHECK-LABEL: @f_switch394; CHECK-LABEL: entry:95; CHECK: i32 10, label %sw.epilog96; CHECK: i32 20, label %sw.epilog97entry:98  switch i32 %c, label %sw.default [99    i32 10, label %sw.bb100    i32 20, label %sw.bb2101    i32 30, label %sw.bb3102    i32 40, label %sw.bb4103  ], !prof !2104 105sw.bb:                                            ; preds = %entry106  br label %sw.epilog107 108sw.bb2:                                           ; preds = %entry109  br label %sw.epilog110 111sw.bb3:                                           ; preds = %entry112  call void @callcase3()113  br label %sw.epilog114 115sw.bb4:                                           ; preds = %entry116  call void @callcase4()117  br label %sw.epilog118 119sw.default:                                       ; preds = %entry120  call void @calldefault()121  br label %sw.epilog122 123; CHECK-LABEL: sw.epilog:124; CHECK: %fp.0 = phi ptr [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %entry ], [ @F1, %entry ]125sw.epilog:                                        ; preds = %sw.default, %sw.bb3, %sw.bb2, %sw.bb126  %fp.0 = phi ptr [ @FD, %sw.default ], [ @F4, %sw.bb4 ], [ @F3, %sw.bb3 ], [ @F1, %sw.bb2 ], [ @F1, %sw.bb ]127  call void %fp.0()128  ret i32 0129}130 131declare void @F1(...) local_unnamed_addr132declare void @F2(...) local_unnamed_addr133declare void @F3(...) local_unnamed_addr134declare void @F4(...) local_unnamed_addr135declare void @FD(...) local_unnamed_addr136declare void @callcase3(...) local_unnamed_addr137declare void @callcase4(...) local_unnamed_addr138declare void @calldefault(...) local_unnamed_addr139 140!0 = !{!"branch_weights", i32 5, i32 1, i32 1,i32 5, i32 5}141!1 = !{!"branch_weights", i32 1 , i32 5, i32 1,i32 1, i32 1}142!2 = !{!"branch_weights", i32 1 , i32 4, i32 1,i32 1, i32 1}143 144 145; This test that BFI/BPI is created without any assertion in isMergingEmptyBlockProfitable()146; in the case where empty blocks are removed before creating BFI/BPI.147@b = common global i32 0, align 4148@a = common global ptr null, align 8149define i32 @should_not_assert(i32 %i) local_unnamed_addr {150entry:151  %0 = load i32, ptr @b, align 4152  %cond = icmp eq i32 %0, 6153  br i1 %cond, label %while.cond.preheader, label %sw.epilog154 155while.cond.preheader:                             ; preds = %entry156  %1 = load ptr, ptr @a, align 8157  %magicptr = ptrtoint ptr %1 to i64158  %arrayidx = getelementptr inbounds i32, ptr %1, i64 1159  br label %while.cond160 161while.cond:                                       ; preds = %while.cond.preheader, %land.rhs162  switch i64 %magicptr, label %land.rhs [163    i64 32, label %while.cond2.loopexit164    i64 0, label %while.cond2.loopexit165  ]166 167land.rhs:                                         ; preds = %while.cond168  %2 = load i32, ptr %arrayidx, align 4169  %tobool1 = icmp eq i32 %2, 0170  br i1 %tobool1, label %while.cond2thread-pre-split.loopexit, label %while.cond171 172while.cond2thread-pre-split.loopexit:             ; preds = %land.rhs173  br label %while.cond2thread-pre-split174 175while.cond2thread-pre-split:                      ; preds = %while.cond2thread-pre-split.loopexit, %while.body4176  %.pr = phi ptr [ %.pr.pre, %while.body4 ], [ %1, %while.cond2thread-pre-split.loopexit ]177  br label %while.cond2178 179while.cond2.loopexit:                             ; preds = %while.cond, %while.cond180  br label %while.cond2181 182while.cond2:                                      ; preds = %while.cond2.loopexit, %while.cond2thread-pre-split183  %3 = phi ptr [ %.pr, %while.cond2thread-pre-split ], [ %1, %while.cond2.loopexit ]184  %tobool3 = icmp eq ptr %3, null185  br i1 %tobool3, label %sw.epilog, label %while.body4186 187while.body4:                                      ; preds = %while.cond2188  tail call void @fn2()189  %.pr.pre = load ptr, ptr @a, align 8190  br label %while.cond2thread-pre-split191 192sw.epilog:                                        ; preds = %while.cond2, %entry193  ret i32 undef194}195 196 197declare void @fn2(...) local_unnamed_addr198 199