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1; RUN: opt -mtriple=riscv32-unknown-elf -S -passes=consthoist < %s | FileCheck %s -check-prefixes=CHECK,RV32I2; RUN: opt -mtriple=riscv64-unknown-elf -S -passes=consthoist < %s | FileCheck %s -check-prefixes=CHECK,RV64I3 4; Check that we don't hoist immediates with small values.5define i64 @test1(i64 %a) nounwind {6; CHECK-LABEL: test17; CHECK-NOT: %const = bitcast i64 2 to i648 %1 = mul i64 %a, 29 %2 = add i64 %1, 210 ret i64 %211}12 13; Check that we don't hoist immediates with small values.14define i64 @test2(i64 %a) nounwind {15; CHECK-LABEL: test216; CHECK-NOT: %const = bitcast i64 2047 to i6417 %1 = mul i64 %a, 204718 %2 = add i64 %1, 204719 ret i64 %220}21 22; Check that we hoist immediates with large values.23define i64 @test3(i64 %a) nounwind {24; CHECK-LABEL: test325; CHECK: %const = bitcast i64 32766 to i6426 %1 = mul i64 %a, 3276627 %2 = add i64 %1, 3276628 ret i64 %229}30 31; Check that we hoist immediates with very large values.32define i128 @test4(i128 %a) nounwind {33; CHECK-LABEL: test434; CHECK: %const = bitcast i128 12297829382473034410122878 to i12835 %1 = add i128 %a, 1229782938247303441012287836 %2 = add i128 %1, 1229782938247303441012287837 ret i128 %238}39 40; Check that we hoist zext.h without Zbb.41define i32 @test5(i32 %a) nounwind {42; CHECK-LABEL: test543; CHECK: %const = bitcast i32 65535 to i3244 %1 = and i32 %a, 6553545 %2 = and i32 %1, 6553546 ret i32 %247}48 49; Check that we don't hoist zext.h with 65535 with Zbb.50define i32 @test6(i32 %a) nounwind "target-features"="+zbb" {51; CHECK-LABEL: test652; CHECK: and i32 %a, 6553553 %1 = and i32 %a, 6553554 %2 = and i32 %1, 6553555 ret i32 %256}57 58; Check that we hoist zext.w without Zba on RV64.59; Check that we don't hoist on RV32.60define i64 @test7(i64 %a) nounwind {61; RV32I-LABEL: test762; RV32I: and i64 %a, 429496729563 64; RV64I-LABEL: test765; RV64I: %const = bitcast i64 4294967295 to i6466 %1 = and i64 %a, 429496729567 %2 = and i64 %1, 429496729568 ret i64 %269}70 71; Check that we don't hoist zext.w with Zba on RV64.72; Check that we don't hoist on RV32.73define i64 @test8(i64 %a) nounwind "target-features"="+zba" {74; CHECK-LABEL: test875; CHECK: and i64 %a, 429496729576 %1 = and i64 %a, 429496729577 %2 = and i64 %1, 429496729578 ret i64 %279}80 81; Check that we don't hoist mul with negated power of 2.82define i64 @test9(i64 %a) nounwind {83; CHECK-LABEL: test984; CHECK: mul i64 %a, -429496729685 %1 = mul i64 %a, -429496729686 %2 = mul i64 %1, -429496729687 ret i64 %288}89 90define i32 @test10(i32 %a, i32 %b) nounwind {91; CHECK-LABEL: @test10(92; CHECK: shl i32 %a, 893; CHECK: and i32 %1, 6528094; CHECK: shl i32 %b, 895; CHECK: and i32 %3, 6528096 %1 = shl i32 %a, 897 %2 = and i32 %1, 6528098 %3 = shl i32 %b, 899 %4 = and i32 %3, 65280100 %5 = mul i32 %2, %4101 ret i32 %5102}103 104; bseti105define i64 @test11(i64 %a) nounwind "target-features"="+zbs" {106; CHECK-LABEL: test11107; CHECK: or i64 %a, 8589934592108 %1 = or i64 %a, 8589934592 ; 1 << 33109 %2 = or i64 %1, 8589934592 ; 1 << 33110 ret i64 %2111}112 113; binvi114define i64 @test12(i64 %a) nounwind "target-features"="+zbs" {115; CHECK-LABEL: test12116; CHECK: xor i64 %a, -9223372036854775808117 %1 = xor i64 %a, -9223372036854775808 ; 1 << 63118 %2 = xor i64 %1, -9223372036854775808 ; 1 << 63119 ret i64 %2120}121 122; bclri123define i64 @test13(i64 %a) nounwind "target-features"="+zbs" {124; CHECK-LABEL: test13125; CHECK: and i64 %a, -281474976710657126 %1 = and i64 %a, -281474976710657 ; ~(1 << 48)127 %2 = and i64 %1, -281474976710657 ; ~(1 << 48)128 ret i64 %2129}130 131; Check that we don't hoist mul by a power of 2.132define i64 @test14(i64 %a) nounwind {133; CHECK-LABEL: test14134; CHECK: mul i64 %a, 2048135 %1 = mul i64 %a, 2048136 %2 = mul i64 %1, 2048137 ret i64 %2138}139 140; Check that we don't hoist mul by one less than a power of 2.141define i64 @test15(i64 %a) nounwind {142; CHECK-LABEL: test15143; CHECK: mul i64 %a, 65535144 %1 = mul i64 %a, 65535145 %2 = mul i64 %1, 65535146 ret i64 %2147}148 149; Check that we don't hoist mul by one more than a power of 2.150define i64 @test16(i64 %a) nounwind {151; CHECK-LABEL: test16152; CHECK: mul i64 %a, 65537153 %1 = mul i64 %a, 65537154 %2 = mul i64 %1, 65537155 ret i64 %2156}157 158; Check that we hoist the absolute address of the stores to the entry block.159define void @test17(ptr %s, i32 %size) nounwind {160; CHECK-LABEL: test17161; CHECK: %const = bitcast i32 -1073741792 to i32162; CHECK: %0 = inttoptr i32 %const to ptr163; CHECK: store i32 20, ptr %0164; CHECK: %1 = inttoptr i32 %const to ptr165; CHECK: store i32 10, ptr %1166entry:167 %cond = icmp eq i32 %size, 0168 br i1 %cond, label %if.true, label %exit169if.true:170 store i32 20, ptr inttoptr (i32 -1073741792 to ptr)171 br label %exit172exit:173 store i32 10, ptr inttoptr (i32 -1073741792 to ptr)174 ret void175}176 177; Check that we hoist the absolute address of the loads to the entry block.178define i32 @test18(ptr %s, i32 %size) nounwind {179; CHECK-LABEL: test18180; CHECK: %const = bitcast i32 -1073741792 to i32181; CHECK: %0 = inttoptr i32 %const to ptr182; CHECK: %1 = load i32, ptr %0183; CHECK: %2 = inttoptr i32 %const to ptr184; CHECK: %3 = load i32, ptr %2185entry:186 %cond = icmp eq i32 %size, 0187 br i1 %cond, label %if.true, label %if.false188if.true:189 %0 = load i32, ptr inttoptr (i32 -1073741792 to ptr)190 br label %return191if.false:192 %1 = load i32, ptr inttoptr (i32 -1073741792 to ptr)193 br label %return194return:195 %val = phi i32 [%0, %if.true], [%1, %if.false]196 ret i32 %val197}198 199 200; For addresses between [0, 2048), we can use ld/sd xN, address(zero), so don't201; hoist.202define void @test19(ptr %s, i32 %size) nounwind {203; CHECK-LABEL: test19204; CHECK: store i32 20, ptr inttoptr (i32 2044 to ptr)205; CHECK: store i32 10, ptr inttoptr (i32 2044 to ptr)206entry:207 %cond = icmp eq i32 %size, 0208 br i1 %cond, label %if.true, label %exit209if.true:210 store i32 20, ptr inttoptr (i32 2044 to ptr)211 br label %exit212exit:213 store i32 10, ptr inttoptr (i32 2044 to ptr)214 ret void215}216 217; Check that we use a common base for immediates needed by a store if the218; constants require more than 1 instruction.219define void @test20(ptr %p1, ptr %p2) {220; CHECK-LABEL: test20221; CHECK: %const = bitcast i32 15111111 to i32222; CHECK: store i32 %const, ptr %p1, align 4223; CHECK: %const_mat = add i32 %const, 1224; CHECK: store i32 %const_mat, ptr %p2, align 4225 store i32 15111111, ptr %p1, align 4226 store i32 15111112, ptr %p2, align 4227 ret void228}229 230define void @test21(ptr %p1, ptr %p2) {231; CHECK-LABEL: define void @test21(232; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {233; CHECK-NEXT: store i32 15111111, ptr [[P1]], align 1234; CHECK-NEXT: store i32 15111112, ptr [[P2]], align 1235; CHECK-NEXT: ret void236;237 store i32 15111111, ptr %p1, align 1238 store i32 15111112, ptr %p2, align 1239 ret void240}241 242; 0 immediates shouldn't be hoisted.243define void @test22(ptr %p1, ptr %p2) {244; CHECK-LABEL: define void @test22(245; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {246; CHECK-NEXT: store i64 0, ptr [[P1]], align 8247; CHECK-NEXT: store i64 -1, ptr [[P2]], align 8248; CHECK-NEXT: ret void249;250 store i64 0, ptr %p1, align 8251 store i64 -1, ptr %p2, align 8252 ret void253}254 255; 0 immediates shouldn't be hoisted.256define void @test23(ptr %p1, ptr %p2) {257; CHECK-LABEL: define void @test23(258; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {259; CHECK-NEXT: store i127 0, ptr [[P1]], align 8260; CHECK-NEXT: store i127 -1, ptr [[P2]], align 8261; CHECK-NEXT: ret void262;263 store i127 0, ptr %p1, align 8264 store i127 -1, ptr %p2, align 8265 ret void266}267 268; Hoisting doesn't happen for types that aren't legal.269define void @test24(ptr %p1, ptr %p2) {270; CHECK-LABEL: define void @test24(271; CHECK-SAME: ptr [[P1:%.*]], ptr [[P2:%.*]]) {272; CHECK-NEXT: store i128 15111111, ptr [[P1]], align 4273; CHECK-NEXT: store i128 15111112, ptr [[P2]], align 4274; CHECK-NEXT: ret void275;276 store i128 15111111, ptr %p1, align 4277 store i128 15111112, ptr %p2, align 4278 ret void279}280