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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py2; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s3 4declare void @llvm.assume(i1 noundef) #05 6define i1 @n_unknown(ptr %dst, i32 %n, i32 %i) {7; CHECK-LABEL: @n_unknown(8; CHECK-NEXT: entry:9; CHECK-NEXT: [[SUB:%.*]] = add i32 [[N:%.*]], -110; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[SUB]] to i6411; CHECK-NEXT: [[PTR_N_SUB_1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i64 [[IDXPROM]]12; CHECK-NEXT: [[CMP_PTR_DST:%.*]] = icmp uge ptr [[PTR_N_SUB_1]], [[DST]]13; CHECK-NEXT: br i1 [[CMP_PTR_DST]], label [[PRE_BB_2:%.*]], label [[EXIT:%.*]]14; CHECK: exit:15; CHECK-NEXT: ret i1 false16; CHECK: pre.bb.2:17; CHECK-NEXT: br i1 true, label [[TGT_BB:%.*]], label [[EXIT]]18; CHECK: tgt.bb:19; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[I:%.*]], [[N]]20; CHECK-NEXT: ret i1 [[CMP1]]21;22entry:23 %sub = add i32 %n, -124 %idxprom = zext i32 %sub to i6425 %ptr.n.sub.1 = getelementptr i32, ptr %dst, i64 %idxprom26 %cmp.ptr.dst = icmp uge ptr %ptr.n.sub.1, %dst27 br i1 %cmp.ptr.dst, label %pre.bb.2, label %exit28 29exit:30 ret i1 false31 32pre.bb.2:33 %pre.2 = icmp uge i32 %i, 034 br i1 %pre.2, label %tgt.bb, label %exit35 36tgt.bb:37 %cmp1 = icmp ult i32 %i, %n38 ret i1 %cmp139}40 41define i1 @n_known_zero_due_to_nuw(ptr %dst, i32 %n, i32 %i) {42; CHECK-LABEL: @n_known_zero_due_to_nuw(43; CHECK-NEXT: entry:44; CHECK-NEXT: [[SUB:%.*]] = add i32 [[N:%.*]], -145; CHECK-NEXT: [[IDXPROM:%.*]] = zext i32 [[SUB]] to i6446; CHECK-NEXT: [[PTR_N_SUB_1:%.*]] = getelementptr i32, ptr [[DST:%.*]], i64 [[IDXPROM]]47; CHECK-NEXT: [[CMP_PTR_DST:%.*]] = icmp uge ptr [[PTR_N_SUB_1]], [[DST]]48; CHECK-NEXT: br i1 [[CMP_PTR_DST]], label [[PRE_BB_2:%.*]], label [[EXIT:%.*]]49; CHECK: exit:50; CHECK-NEXT: ret i1 false51; CHECK: pre.bb.2:52; CHECK-NEXT: br i1 true, label [[TGT_BB:%.*]], label [[EXIT]]53; CHECK: tgt.bb:54; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[I:%.*]], [[N]]55; CHECK-NEXT: ret i1 [[CMP1]]56;57entry:58 %sub = add i32 %n, -159 %idxprom = zext i32 %sub to i6460 %ptr.n.sub.1 = getelementptr i32, ptr %dst, i64 %idxprom61 %cmp.ptr.dst = icmp uge ptr %ptr.n.sub.1, %dst62 br i1 %cmp.ptr.dst, label %pre.bb.2, label %exit63 64exit:65 ret i1 false66 67pre.bb.2:68 %pre.2 = icmp uge i32 %i, 069 br i1 %pre.2, label %tgt.bb, label %exit70 71tgt.bb:72 %cmp1 = icmp ult i32 %i, %n73 ret i1 %cmp174}75 76define i4 @inc_ptr_N_could_be_negative(ptr %src, ptr %lower, ptr %upper, i8 %N, i8 %step) {77; CHECK-LABEL: @inc_ptr_N_could_be_negative(78; CHECK-NEXT: entry:79; CHECK-NEXT: [[SRC_END:%.*]] = getelementptr inbounds i8, ptr [[SRC:%.*]], i8 [[N:%.*]]80; CHECK-NEXT: [[CMP_SRC_START:%.*]] = icmp ult ptr [[SRC]], [[LOWER:%.*]]81; CHECK-NEXT: [[CMP_SRC_END:%.*]] = icmp uge ptr [[SRC_END]], [[UPPER:%.*]]82; CHECK-NEXT: [[OR_PRECOND_0:%.*]] = or i1 [[CMP_SRC_START]], [[CMP_SRC_END]]83; CHECK-NEXT: br i1 [[OR_PRECOND_0]], label [[TRAP_BB:%.*]], label [[STEP_CHECK:%.*]]84; CHECK: trap.bb:85; CHECK-NEXT: ret i4 286; CHECK: step.check:87; CHECK-NEXT: [[NEXT:%.*]] = add nuw nsw i8 [[STEP:%.*]], 288; CHECK-NEXT: [[STEP_ULT_N:%.*]] = icmp ult i8 [[NEXT]], [[N]]89; CHECK-NEXT: [[AND_STEP:%.*]] = and i1 true, [[STEP_ULT_N]]90; CHECK-NEXT: br i1 [[AND_STEP]], label [[PTR_CHECK:%.*]], label [[EXIT:%.*]]91; CHECK: ptr.check:92; CHECK-NEXT: [[SRC_STEP:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i8 [[STEP]]93; CHECK-NEXT: [[CMP_STEP_START:%.*]] = icmp ult ptr [[SRC_STEP]], [[LOWER]]94; CHECK-NEXT: [[CMP_STEP_END:%.*]] = icmp uge ptr [[SRC_STEP]], [[UPPER]]95; CHECK-NEXT: [[OR_CHECK:%.*]] = or i1 [[CMP_STEP_START]], [[CMP_STEP_END]]96; CHECK-NEXT: br i1 [[OR_CHECK]], label [[TRAP_BB]], label [[EXIT]]97; CHECK: exit:98; CHECK-NEXT: ret i4 399;100entry:101 %src.end = getelementptr inbounds i8, ptr %src, i8 %N102 %cmp.src.start = icmp ult ptr %src, %lower103 %cmp.src.end = icmp uge ptr %src.end, %upper104 %or.precond.0 = or i1 %cmp.src.start, %cmp.src.end105 br i1 %or.precond.0, label %trap.bb, label %step.check106 107trap.bb:108 ret i4 2109 110step.check:111 %step.pos = icmp uge i8 %step, 0112 %next = add nuw nsw i8 %step, 2113 %step.ult.N = icmp ult i8 %next, %N114 %and.step = and i1 %step.pos, %step.ult.N115 br i1 %and.step, label %ptr.check, label %exit116 117ptr.check:118 %src.step = getelementptr inbounds i8, ptr %src, i8 %step119 %cmp.step.start = icmp ult ptr %src.step, %lower120 %cmp.step.end = icmp uge ptr %src.step, %upper121 %or.check = or i1 %cmp.step.start, %cmp.step.end122 br i1 %or.check, label %trap.bb, label %exit123 124exit:125 ret i4 3126}127 128define i4 @inc_ptr_src_uge_end(ptr %src, ptr %lower, ptr %upper, i16 %N, i16 %step) {129; CHECK-LABEL: @inc_ptr_src_uge_end(130; CHECK-NEXT: entry:131; CHECK-NEXT: [[SRC_END:%.*]] = getelementptr inbounds i8, ptr [[SRC:%.*]], i16 [[N:%.*]]132; CHECK-NEXT: [[CMP_SRC_START:%.*]] = icmp ult ptr [[SRC]], [[LOWER:%.*]]133; CHECK-NEXT: [[CMP_SRC_END:%.*]] = icmp uge ptr [[SRC_END]], [[UPPER:%.*]]134; CHECK-NEXT: [[CMP_OVERFLOW:%.*]] = icmp ugt ptr [[SRC]], [[SRC_END]]135; CHECK-NEXT: [[OR_PRECOND_0:%.*]] = or i1 [[CMP_SRC_START]], [[CMP_SRC_END]]136; CHECK-NEXT: [[OR_PRECOND_1:%.*]] = or i1 [[OR_PRECOND_0]], [[CMP_OVERFLOW]]137; CHECK-NEXT: br i1 [[OR_PRECOND_1]], label [[TRAP_BB:%.*]], label [[STEP_CHECK:%.*]]138; CHECK: trap.bb:139; CHECK-NEXT: ret i4 2140; CHECK: step.check:141; CHECK-NEXT: [[NEXT:%.*]] = add nuw nsw i16 [[STEP:%.*]], 2142; CHECK-NEXT: [[STEP_ULT_N:%.*]] = icmp ult i16 [[NEXT]], [[N]]143; CHECK-NEXT: [[AND_STEP:%.*]] = and i1 true, [[STEP_ULT_N]]144; CHECK-NEXT: br i1 [[AND_STEP]], label [[PTR_CHECK:%.*]], label [[EXIT:%.*]]145; CHECK: ptr.check:146; CHECK-NEXT: [[SRC_STEP:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i16 [[STEP]]147; CHECK-NEXT: [[CMP_STEP_START:%.*]] = icmp ult ptr [[SRC_STEP]], [[LOWER]]148; CHECK-NEXT: [[CMP_STEP_END:%.*]] = icmp uge ptr [[SRC_STEP]], [[UPPER]]149; CHECK-NEXT: [[OR_CHECK:%.*]] = or i1 [[CMP_STEP_START]], [[CMP_STEP_END]]150; CHECK-NEXT: br i1 [[OR_CHECK]], label [[TRAP_BB]], label [[EXIT]]151; CHECK: exit:152; CHECK-NEXT: ret i4 3153;154entry:155 %src.end = getelementptr inbounds i8, ptr %src, i16 %N156 %cmp.src.start = icmp ult ptr %src, %lower157 %cmp.src.end = icmp uge ptr %src.end, %upper158 %cmp.overflow = icmp ugt ptr %src, %src.end159 %or.precond.0 = or i1 %cmp.src.start, %cmp.src.end160 %or.precond.1 = or i1 %or.precond.0, %cmp.overflow161 br i1 %or.precond.1, label %trap.bb, label %step.check162 163trap.bb:164 ret i4 2165 166step.check:167 %step.pos = icmp uge i16 %step, 0168 %next = add nuw nsw i16 %step, 2169 %step.ult.N = icmp ult i16 %next, %N170 %and.step = and i1 %step.pos, %step.ult.N171 br i1 %and.step, label %ptr.check, label %exit172 173ptr.check:174 %src.step = getelementptr inbounds i8, ptr %src, i16 %step175 %cmp.step.start = icmp ult ptr %src.step, %lower176 %cmp.step.end = icmp uge ptr %src.step, %upper177 %or.check = or i1 %cmp.step.start, %cmp.step.end178 br i1 %or.check, label %trap.bb, label %exit179 180exit:181 ret i4 3182}183 184define i4 @inc_ptr_src_uge_end_no_nsw_add(ptr %src, ptr %lower, ptr %upper, i16 %idx, i16 %N, i16 %step) {185; CHECK-LABEL: @inc_ptr_src_uge_end_no_nsw_add(186; CHECK-NEXT: entry.1:187; CHECK-NEXT: [[IDX_POS:%.*]] = icmp sge i16 [[IDX:%.*]], 0188; CHECK-NEXT: br i1 [[IDX_POS]], label [[ENTRY:%.*]], label [[TRAP_BB:%.*]]189; CHECK: entry:190; CHECK-NEXT: [[SRC_IDX:%.*]] = getelementptr inbounds i8, ptr [[SRC:%.*]], i16 [[IDX]]191; CHECK-NEXT: [[CMP_SRC_START:%.*]] = icmp ult ptr [[SRC_IDX]], [[LOWER:%.*]]192; CHECK-NEXT: br i1 [[CMP_SRC_START]], label [[TRAP_BB]], label [[STEP_CHECK:%.*]]193; CHECK: trap.bb:194; CHECK-NEXT: ret i4 2195; CHECK: step.check:196; CHECK-NEXT: [[NEXT:%.*]] = add i16 [[IDX]], 2197; CHECK-NEXT: [[SRC_STEP:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i16 [[NEXT]]198; CHECK-NEXT: [[CMP_STEP_START:%.*]] = icmp ult ptr [[SRC_STEP]], [[LOWER]]199; CHECK-NEXT: [[CMP_STEP_END:%.*]] = icmp uge ptr [[SRC_STEP]], [[UPPER:%.*]]200; CHECK-NEXT: [[OR_CHECK:%.*]] = or i1 [[CMP_STEP_START]], [[CMP_STEP_END]]201; CHECK-NEXT: br i1 [[OR_CHECK]], label [[TRAP_BB]], label [[EXIT:%.*]]202; CHECK: exit:203; CHECK-NEXT: ret i4 3204;205entry.1:206 %idx.pos = icmp sge i16 %idx, 0207 br i1 %idx.pos, label %entry, label %trap.bb208 209entry:210 %src.idx = getelementptr inbounds i8, ptr %src, i16 %idx211 %cmp.src.start = icmp ult ptr %src.idx, %lower212 br i1 %cmp.src.start, label %trap.bb, label %step.check213 214trap.bb:215 ret i4 2216 217step.check:218 %next = add i16 %idx, 2219 %src.step = getelementptr inbounds i8, ptr %src, i16 %next220 %cmp.step.start = icmp ult ptr %src.step, %lower221 %cmp.step.end = icmp uge ptr %src.step, %upper222 %or.check = or i1 %cmp.step.start, %cmp.step.end223 br i1 %or.check, label %trap.bb, label %exit224 225exit:226 ret i4 3227}228 229define i4 @inc_ptr_src_uge_end_no_nsw_add_sge_0(ptr %src, ptr %lower, ptr %upper, i16 %idx, i16 %N, i16 %step) {230; CHECK-LABEL: @inc_ptr_src_uge_end_no_nsw_add_sge_0(231; CHECK-NEXT: entry.1:232; CHECK-NEXT: [[IDX_POS:%.*]] = icmp sge i16 [[IDX:%.*]], 0233; CHECK-NEXT: br i1 [[IDX_POS]], label [[ENTRY:%.*]], label [[TRAP_BB:%.*]]234; CHECK: entry:235; CHECK-NEXT: [[SRC_IDX:%.*]] = getelementptr inbounds i8, ptr [[SRC:%.*]], i16 [[IDX]]236; CHECK-NEXT: [[CMP_SRC_START:%.*]] = icmp ult ptr [[SRC_IDX]], [[LOWER:%.*]]237; CHECK-NEXT: br i1 [[CMP_SRC_START]], label [[TRAP_BB]], label [[STEP_CHECK:%.*]]238; CHECK: trap.bb:239; CHECK-NEXT: ret i4 2240; CHECK: step.check:241; CHECK-NEXT: [[NEXT:%.*]] = add i16 [[IDX]], 2242; CHECK-NEXT: [[SRC_STEP:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i16 [[NEXT]]243; CHECK-NEXT: [[CMP_STEP_START:%.*]] = icmp ult ptr [[SRC_STEP]], [[LOWER]]244; CHECK-NEXT: [[CMP_STEP_END:%.*]] = icmp uge ptr [[SRC_STEP]], [[UPPER:%.*]]245; CHECK-NEXT: [[OR_CHECK:%.*]] = or i1 [[CMP_STEP_START]], [[CMP_STEP_END]]246; CHECK-NEXT: br i1 [[OR_CHECK]], label [[TRAP_BB]], label [[EXIT:%.*]]247; CHECK: exit:248; CHECK-NEXT: ret i4 3249;250entry.1:251 %idx.pos = icmp sge i16 %idx, 0252 br i1 %idx.pos, label %entry, label %trap.bb253 254entry:255 %src.idx = getelementptr inbounds i8, ptr %src, i16 %idx256 %cmp.src.start = icmp ult ptr %src.idx, %lower257 br i1 %cmp.src.start, label %trap.bb, label %step.check258 259trap.bb:260 ret i4 2261 262step.check:263 %next = add i16 %idx, 2264 %src.step = getelementptr inbounds i8, ptr %src, i16 %next265 %cmp.step.start = icmp ult ptr %src.step, %lower266 %cmp.step.end = icmp uge ptr %src.step, %upper267 %or.check = or i1 %cmp.step.start, %cmp.step.end268 br i1 %or.check, label %trap.bb, label %exit269 270exit:271 ret i4 3272}273define i4 @ptr_N_step_zext_n_zext(ptr %src, ptr %lower, ptr %upper, i16 %N, i16 %step) {274; CHECK-LABEL: @ptr_N_step_zext_n_zext(275; CHECK-NEXT: entry:276; CHECK-NEXT: [[N_ADD_1:%.*]] = add nuw nsw i16 [[N:%.*]], 1277; CHECK-NEXT: [[N_ADD_1_EXT:%.*]] = zext i16 [[N_ADD_1]] to i32278; CHECK-NEXT: [[SRC_END:%.*]] = getelementptr inbounds i8, ptr [[SRC:%.*]], i32 [[N_ADD_1_EXT]]279; CHECK-NEXT: [[CMP_SRC_START:%.*]] = icmp ult ptr [[SRC]], [[LOWER:%.*]]280; CHECK-NEXT: [[CMP_SRC_END:%.*]] = icmp uge ptr [[SRC_END]], [[UPPER:%.*]]281; CHECK-NEXT: [[OR_PRECOND_0:%.*]] = or i1 [[CMP_SRC_START]], [[CMP_SRC_END]]282; CHECK-NEXT: br i1 [[OR_PRECOND_0]], label [[TRAP_BB:%.*]], label [[STEP_CHECK:%.*]]283; CHECK: trap.bb:284; CHECK-NEXT: ret i4 2285; CHECK: step.check:286; CHECK-NEXT: [[STEP_ADD_1:%.*]] = add nuw nsw i16 [[STEP:%.*]], 1287; CHECK-NEXT: [[STEP_ADD_1_EXT:%.*]] = zext i16 [[STEP_ADD_1]] to i32288; CHECK-NEXT: [[STEP_ULT_N:%.*]] = icmp ult i32 [[STEP_ADD_1_EXT]], [[N_ADD_1_EXT]]289; CHECK-NEXT: br i1 [[STEP_ULT_N]], label [[PTR_CHECK:%.*]], label [[EXIT:%.*]]290; CHECK: ptr.check:291; CHECK-NEXT: [[SRC_STEP:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i32 [[STEP_ADD_1_EXT]]292; CHECK-NEXT: [[OR_CHECK:%.*]] = or i1 false, false293; CHECK-NEXT: br i1 [[OR_CHECK]], label [[TRAP_BB]], label [[EXIT]]294; CHECK: exit:295; CHECK-NEXT: ret i4 3296;297entry:298 %N.add.1 = add nuw nsw i16 %N, 1299 %N.add.1.ext = zext i16 %N.add.1 to i32300 %src.end = getelementptr inbounds i8, ptr %src, i32 %N.add.1.ext301 %cmp.src.start = icmp ult ptr %src, %lower302 %cmp.src.end = icmp uge ptr %src.end, %upper303 %or.precond.0 = or i1 %cmp.src.start, %cmp.src.end304 br i1 %or.precond.0, label %trap.bb, label %step.check305 306trap.bb:307 ret i4 2308 309step.check:310 %step.add.1 = add nuw nsw i16 %step, 1311 %step.add.1.ext = zext i16 %step.add.1 to i32312 %step.ult.N = icmp ult i32 %step.add.1.ext, %N.add.1.ext313 br i1 %step.ult.N, label %ptr.check, label %exit314 315ptr.check:316 %src.step = getelementptr inbounds i8, ptr %src, i32 %step.add.1.ext317 %cmp.step.start = icmp ult ptr %src.step, %lower318 %cmp.step.end = icmp uge ptr %src.step, %upper319 %or.check = or i1 %cmp.step.start, %cmp.step.end320 br i1 %or.check, label %trap.bb, label %exit321 322exit:323 ret i4 3324}325 326define i4 @ptr_N_step_zext_n_zext_out_of_bounds(ptr %src, ptr %lower, ptr %upper, i16 %N, i16 %step) {327; CHECK-LABEL: @ptr_N_step_zext_n_zext_out_of_bounds(328; CHECK-NEXT: entry:329; CHECK-NEXT: [[N_ADD_2:%.*]] = add nuw nsw i16 [[N:%.*]], 2330; CHECK-NEXT: [[N_ADD_2_EXT:%.*]] = zext i16 [[N_ADD_2]] to i32331; CHECK-NEXT: [[SRC_END:%.*]] = getelementptr inbounds i8, ptr [[SRC:%.*]], i32 [[N_ADD_2_EXT]]332; CHECK-NEXT: [[CMP_SRC_START:%.*]] = icmp ult ptr [[SRC]], [[LOWER:%.*]]333; CHECK-NEXT: [[CMP_SRC_END:%.*]] = icmp uge ptr [[SRC_END]], [[UPPER:%.*]]334; CHECK-NEXT: [[OR_PRECOND_0:%.*]] = or i1 [[CMP_SRC_START]], [[CMP_SRC_END]]335; CHECK-NEXT: br i1 [[OR_PRECOND_0]], label [[TRAP_BB:%.*]], label [[STEP_CHECK:%.*]]336; CHECK: trap.bb:337; CHECK-NEXT: ret i4 2338; CHECK: step.check:339; CHECK-NEXT: [[STEP_ADD_2:%.*]] = add nuw nsw i16 [[STEP:%.*]], 2340; CHECK-NEXT: [[STEP_ADD_2_EXT:%.*]] = zext i16 [[STEP_ADD_2]] to i32341; CHECK-NEXT: [[STEP_EXT:%.*]] = zext i16 [[STEP]] to i32342; CHECK-NEXT: [[STEP_ULT_N:%.*]] = icmp ult i32 [[STEP_EXT]], [[N_ADD_2_EXT]]343; CHECK-NEXT: br i1 [[STEP_ULT_N]], label [[PTR_CHECK:%.*]], label [[EXIT:%.*]]344; CHECK: ptr.check:345; CHECK-NEXT: [[SRC_STEP:%.*]] = getelementptr inbounds i8, ptr [[SRC]], i32 [[STEP_ADD_2_EXT]]346; CHECK-NEXT: [[CMP_STEP_END:%.*]] = icmp uge ptr [[SRC_STEP]], [[UPPER]]347; CHECK-NEXT: [[OR_CHECK:%.*]] = or i1 false, [[CMP_STEP_END]]348; CHECK-NEXT: br i1 [[OR_CHECK]], label [[TRAP_BB]], label [[EXIT]]349; CHECK: exit:350; CHECK-NEXT: ret i4 3351;352entry:353 %N.add.2 = add nuw nsw i16 %N, 2354 %N.add.2.ext = zext i16 %N.add.2 to i32355 %src.end = getelementptr inbounds i8, ptr %src, i32 %N.add.2.ext356 %cmp.src.start = icmp ult ptr %src, %lower357 %cmp.src.end = icmp uge ptr %src.end, %upper358 %or.precond.0 = or i1 %cmp.src.start, %cmp.src.end359 br i1 %or.precond.0, label %trap.bb, label %step.check360 361trap.bb:362 ret i4 2363 364step.check:365 %step.add.2 = add nuw nsw i16 %step, 2366 %step.add.2.ext = zext i16 %step.add.2 to i32367 %step.ext = zext i16 %step to i32368 %step.ult.N = icmp ult i32 %step.ext, %N.add.2.ext369 br i1 %step.ult.N, label %ptr.check, label %exit370 371ptr.check:372 %src.step = getelementptr inbounds i8, ptr %src, i32 %step.add.2.ext373 %cmp.step.start = icmp ult ptr %src.step, %lower374 %cmp.step.end = icmp uge ptr %src.step, %upper375 %or.check = or i1 %cmp.step.start, %cmp.step.end376 br i1 %or.check, label %trap.bb, label %exit377 378exit:379 ret i4 3380}381 382define i1 @gep_count_add_1_sge_known_ult_1(i32 %count, ptr %p) {383; CHECK-LABEL: @gep_count_add_1_sge_known_ult_1(384; CHECK-NEXT: entry:385; CHECK-NEXT: [[SGE:%.*]] = icmp sge i32 [[COUNT:%.*]], 1386; CHECK-NEXT: call void @llvm.assume(i1 [[SGE]])387; CHECK-NEXT: [[COUNT_EXT:%.*]] = zext i32 [[COUNT]] to i64388; CHECK-NEXT: [[GEP_COUNT:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 [[COUNT_EXT]]389; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[COUNT]], -1390; CHECK-NEXT: [[SUB_EXT:%.*]] = zext i32 [[SUB]] to i64391; CHECK-NEXT: [[GEP_SUB:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 [[SUB_EXT]]392; CHECK-NEXT: ret i1 true393;394entry:395 %sge = icmp sge i32 %count, 1396 call void @llvm.assume(i1 %sge)397 %count.ext = zext i32 %count to i64398 %gep.count = getelementptr inbounds i32, ptr %p, i64 %count.ext399 %sub = add nsw i32 %count, -1400 %sub.ext = zext i32 %sub to i64401 %gep.sub = getelementptr inbounds i32, ptr %p, i64 %sub.ext402 %c = icmp ult ptr %gep.sub, %gep.count403 ;%2 = icmp uge ptr %0, %p404 ret i1 %c405}406 407define i1 @gep_count_add_1_sge_known_uge_1(i32 %count, ptr %p) {408; CHECK-LABEL: @gep_count_add_1_sge_known_uge_1(409; CHECK-NEXT: entry:410; CHECK-NEXT: [[SGE:%.*]] = icmp sge i32 [[COUNT:%.*]], 1411; CHECK-NEXT: call void @llvm.assume(i1 [[SGE]])412; CHECK-NEXT: [[COUNT_EXT:%.*]] = zext i32 [[COUNT]] to i64413; CHECK-NEXT: [[GEP_COUNT:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 [[COUNT_EXT]]414; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[COUNT]], -1415; CHECK-NEXT: [[SUB_EXT:%.*]] = zext i32 [[SUB]] to i64416; CHECK-NEXT: [[GEP_SUB:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 [[SUB_EXT]]417; CHECK-NEXT: ret i1 true418;419entry:420 %sge = icmp sge i32 %count, 1421 call void @llvm.assume(i1 %sge)422 %count.ext = zext i32 %count to i64423 %gep.count = getelementptr inbounds i32, ptr %p, i64 %count.ext424 %sub = add nsw i32 %count, -1425 %sub.ext = zext i32 %sub to i64426 %gep.sub = getelementptr inbounds i32, ptr %p, i64 %sub.ext427 %c = icmp uge ptr %gep.sub, %p428 ret i1 %c429}430 431define i1 @gep_count_add_2_sge_not_known_ult_1(i32 %count, ptr %p) {432; CHECK-LABEL: @gep_count_add_2_sge_not_known_ult_1(433; CHECK-NEXT: entry:434; CHECK-NEXT: [[SGE:%.*]] = icmp sge i32 [[COUNT:%.*]], 1435; CHECK-NEXT: call void @llvm.assume(i1 [[SGE]])436; CHECK-NEXT: [[COUNT_EXT:%.*]] = zext i32 [[COUNT]] to i64437; CHECK-NEXT: [[GEP_COUNT:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 [[COUNT_EXT]]438; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[COUNT]], -2439; CHECK-NEXT: [[SUB_EXT:%.*]] = zext i32 [[SUB]] to i64440; CHECK-NEXT: [[GEP_SUB:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 [[SUB_EXT]]441; CHECK-NEXT: [[C:%.*]] = icmp ult ptr [[GEP_SUB]], [[GEP_COUNT]]442; CHECK-NEXT: ret i1 [[C]]443;444entry:445 %sge = icmp sge i32 %count, 1446 call void @llvm.assume(i1 %sge)447 %count.ext = zext i32 %count to i64448 %gep.count = getelementptr inbounds i32, ptr %p, i64 %count.ext449 %sub = add nsw i32 %count, -2450 %sub.ext = zext i32 %sub to i64451 %gep.sub = getelementptr inbounds i32, ptr %p, i64 %sub.ext452 %c = icmp ult ptr %gep.sub, %gep.count453 ret i1 %c454}455 456define i1 @gep_count_add_2_sge_not_known_uge_1(i32 %count, ptr %p) {457; CHECK-LABEL: @gep_count_add_2_sge_not_known_uge_1(458; CHECK-NEXT: entry:459; CHECK-NEXT: [[SGE:%.*]] = icmp sge i32 [[COUNT:%.*]], 1460; CHECK-NEXT: call void @llvm.assume(i1 [[SGE]])461; CHECK-NEXT: [[COUNT_EXT:%.*]] = zext i32 [[COUNT]] to i64462; CHECK-NEXT: [[GEP_COUNT:%.*]] = getelementptr inbounds i32, ptr [[P:%.*]], i64 [[COUNT_EXT]]463; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[COUNT]], -2464; CHECK-NEXT: [[SUB_EXT:%.*]] = zext i32 [[SUB]] to i64465; CHECK-NEXT: [[GEP_SUB:%.*]] = getelementptr inbounds i32, ptr [[P]], i64 [[SUB_EXT]]466; CHECK-NEXT: [[C:%.*]] = icmp uge ptr [[GEP_SUB]], [[P]]467; CHECK-NEXT: ret i1 [[C]]468;469entry:470 %sge = icmp sge i32 %count, 1471 call void @llvm.assume(i1 %sge)472 %count.ext = zext i32 %count to i64473 %gep.count = getelementptr inbounds i32, ptr %p, i64 %count.ext474 %sub = add nsw i32 %count, -2475 %sub.ext = zext i32 %sub to i64476 %gep.sub = getelementptr inbounds i32, ptr %p, i64 %sub.ext477 %c = icmp uge ptr %gep.sub, %p478 ret i1 %c479}480